S32G2 LinuxBSP 39.0 Change console output to UART1 in arm-trusted-firmware

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S32G2 LinuxBSP 39.0 Change console output to UART1 in arm-trusted-firmware

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agarcia2945
Contributor II

Hello,

We need to change the console output of `arm-trusted-firmware` to UART1 (LINFLEX1) since our project requires UART0 (LINFLEX0) to be used by the M7 cluster.

Inspecting the source code I can see that this should be configurable:

```
#define S32_LINFLEX0_BASE (0x401C8000ul)
#define S32_LINFLEX0_SIZE (0x4000)
#define S32_LINFLEX1_BASE (0x401CC000ul)
#define S32_LINFLEX1_SIZE (0x4000)
```

I can see an option in this file, but the `S32CC_EMU` option seems to have more implications and I could not figure out how to correctly configure it.

Please could you point in the right direction?

Thanks in advance.

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chenyin_h
NXP Employee
NXP Employee

Hello, @avazquez

Thanks for the feedback.

Yes, besides the modification you had done, the pinctrl has to be modified.

By checking the TFA code, I found that at least the following need to be modified, you may reference it and continue the debugging if needed.

 

diff --git a/plat/nxp/s32/s32_pinctrl.c b/plat/nxp/s32/s32_pinctrl.c

index 60bab8d9b..5c9b7cc25 100644

--- a/plat/nxp/s32/s32_pinctrl.c

+++ b/plat/nxp/s32/s32_pinctrl.c

@@ -76,14 +76,16 @@ static const struct s32_peripheral_config uart0_periph = {

 };

 

 /* LinFLEX 1 */

-#define SIUL2_PB09_MSCR_S32_G1_UART1           (25)

-#define SIUL2_PB10_MSCR_S32_G1_UART1           (26)

+#define SIUL2_PB09_MSCR_S32_G1_UART1          (13)

+#define SIUL2_PB10_MSCR_S32_G1_UART1          (16)

 #define SIUL2_PB10_IMCR_S32_G1_UART1           (736)

 

 static const struct s32_pin_config uart1_pinconfs[] = {

        {

                .pin = SIUL2_PB09_MSCR_S32_G1_UART1,

-               .function = SIUL2_MSCR_MUX_MODE_ALT1,

+               .function = SIUL2_MSCR_MUX_MODE_ALT2,

                .no_configs = ARRAY_SIZE(uart_txd_cfgs),

                .configs = uart_txd_cfgs,

        },

@@ -95,7 +97,7 @@ static const struct s32_pin_config uart1_pinconfs[] = {

        },

        {

                .pin = SIUL2_PB10_IMCR_S32_G1_UART1,

-               .function = SIUL2_MSCR_MUX_MODE_ALT3,

+               .function = SIUL2_MSCR_MUX_MODE_ALT2,

        }

 };

Hope it helps.

 

Best Regards

Chenyin

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avazquez
Contributor I

Dear @chenyin_h,

I'm from @agarcia2945 team, I've tested the changes you proposed but the board keeps refusing to start.

This are the changes (basically we removed the conditionals for selecting one or the other and left only the uart1):

build_s32g274ardb2/tmp/work/s32g274ardb2-fsl-linux/arm-trusted-firmware/2.5-r0/git/plat/nxp/s32/include/s32_platform_def.h

162: #define S32_UART_BASE       S32_LINFLEX1_BASE
163: #define S32_UART_SIZE       S32_LINFLEX1_SIZE
 
fsl-auto-yocto-bsp/build_s32g274ardb2/tmp/work/s32g274ardb2-fsl-linux/arm-trusted-firmware/2.5-r0/git/plat/nxp/s32/s32g/s32g_common.mk
57: S32_LINFLEX_MODULE  := 1
 
Would you mind to tell me where I should modify the pinmux?
Thanks.
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chenyin_h
NXP Employee
NXP Employee

Hello, @agarcia2945

Thanks for the question.

From my opinion, it is suggested not using the S32CC_EMU directly to enable the UART1, as mentioned in your post, it is more than just enabling UART1, since it is not intended to be used on common reference boards.

 

For the modification method to use uart1 instead of uart0, currently there are not a ready-made patches, by gone through the code briefly, I suggest modifying the code based on original uart0 scenarios.

For example, modify the default value of S32_LINFLEX_MODULE, S32_UART_BASE, also, modify the pinmux according to the S32G2_IOMUX.xlsx with S32G2RM.

Hope it helps.

 

Best Regards

Chenyin

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