Hi,
In S12X family if we take the example of MC9S12XEP100 datasheet, under the section 17.4.1 it is mentioned. According to that for the condition PITMTLD =0 and PITLD =0, PITCNT will be 0(zero). But this should hold for a bus clock amount of time. After time out interrupt should occur. For the condition PITMTLD =0 and PITLD =1, PITCNT should downcount from 1 to 0. When PITCNT = 1 should hold for one bus clock and similarly PITCNT = 0 also should hold for one bus clock. So in that case it will take two bus clock for time out and interrupt occur.
Regards
Xzidax