Port S12 to S12XA

[sebasira]

Hi all!

I'm porting mi application from S12 to S12XA... For now I'm working with single core

I've never worked with X family before, so I'm completely new to it. I've got some questions:

1- Non-paged RAM is not enough to my project so I need to used the paged one. Let's say that in S12 I had:

byte myVar[200]:byte* myPTR;myPTR = myVar;

If now I put myVar inside paged RAM, then byte* will not have the needed space to hold the address of myVar, rigth? And so I should define it as byte* __rptr (using RPAGE), right?

2- What about EEPROM and FLASH erasing/programming? Can I still use the routines from S12 or I need to get new ones? Do you know where to find them?

Thanks in advance!!

[kef]

You need to use DATA_SEG pragma both in the source and in the header file, in case myVar has to be exported.

#pragma DATA_SEG __RPAGE_SEG PAGED_RAMbyte myVar[200];#pragma DATA_SEG DEFAULTbyte * __rptr myPTR;... in header file myVar should look like this #pragma DATA_SEG __RPAGE_SEG PAGED_RAMextern byte myVar[200];#pragma DATA_SEG DEFAULT

WARNING. Don't forget to add -D__FAR_DATA to compiler settings string, which for some reason is not done by project wizard. As a result you may get L1128 warning, which is very dangerous. It is caused by startup.c file, which thinks that myVar is allocated in nonbanked memory when __FAR_DATA is not defined.

S12 routines are almost identical to S12XA (but not to S12XE/XS). Main difference is that flash registers are not paged on S12X, so you don't have to switch BKSEL bits. Flash sector sice may be different. The rest is very similar.

[sebasira]

Hi kef!

I forgot about the compiler setting, I already have it. I think now I've got to slightly modify flash routines!

Thanks!

[sebasira]

I'm having some troubles with constant objects. For example, in .map file I've got:

Name                   Addr     hSize  dSize  Ref     Section
------------------------------------------------------------------
EEPROM_VARS1       0'Error       4       4       0   EEPROM_DATA_PAGE

 I guess that mean the variable was not allocated in memory... but why?

I'll attach my .PRM and .MAP files, and here I'll post some definitions that also brings that error:

#pragma CONST_SEG EEPROM_DATA_PAGE  const tEEPROM_DATA EEPROM_VARS1 ={0xFFFFFFFF};  const tEEPROM_DATA EEPROM_VARS2 ={0xFFFFFFFF};#pragma CONST_SEG DEFAULT#pragma CONST_SEG   PAGE_TEXT  const byte far _Espere_conexion[] = {"Espere conexion"};#pragma CONST_SEG DEFAULT#pragma CONST_SEG FLASH_DATA_PAGE  static const word far FLASH_GEO_FENCE_STATUS;  // Status de GEO FENCE en FLASH#pragma CONST_SEG DEFAULT

[sebasira]

I've found a technical note that describre data definition on HCS12X, TN238

I try this 2 ways and none of them solve my problem... what am I doing wrong?

First try:

#pragma CONST_SEG __EPAGE_SEG EEPROM_DATA_PAGE  const tEEPROM_DATA EEPROM_VARS1 ={0xFFFFFFFF};  const tEEPROM_DATA EEPROM_VARS2 ={0xFFFFFFFF};#pragma CONST_SEG DEFAULT/************************ PRM FILE ************************/EEPROM_DATA_PAGE INTO EEPROM_FC

Second try:

#pragma CONST_SEG EEPROM_DATA_PAGE  const tEEPROM_DATA EEPROM_VARS1 ={0xFFFFFFFF};  const tEEPROM_DATA EEPROM_VARS2 ={0xFFFFFFFF};#pragma CONST_SEG DEFAULT/************************ PRM FILE ************************/EEPROM_DATA_PAGE INTO EEPROM

[sebasira]

Solved!!!

the correct pragma should be as:

#pragma CONST_SEG __EPAGE_SEG PAGED_CONST

 I thought that "PAGED_CONST" coluld be replaced by  any segment name, but seems it can't

[kef]

EEPROM_FC segment is not defined in your prm. You defined placement to EEPROM_FC, but EEPROM_FC degment is not defined.

[sebasira]

Hi Kef, thanks for replying... 

Please, take a look again, it's defined as:

EEPROM_FC     = READ_ONLY   0xFC0800 TO 0xFC0BFF; 

The strange thing is that PAGED_CONST is not defined but it's the only way it works

[kef]

Sorry. Yes, I see it. But it works well. You don't have to place into PAGED_CONST. You can place into any PLACEMENT, provided it uses existing SEGMENT's . Could you create small project to demostrate this problem and show it?

[sebasira]

Well.... I was working on this dummy project just to show the problem... but it worked... then I re-try on my project an also work...

I guess maybe I was doing something wrong before... but don't know what

Now I've got every data/const where I want and I can test the project... For now, I'm not writting/erasing EEPROM nor FLASH just to test logic and peripherics.

Could you help me with this?

PAGED DATA

One more question about PAGED EEPROM (about all paged data memory, really).... If I define a pointer like byte*__eptr, it doesn't matter in which EEPROM page the const is located, right? I mean, I don't have to deal with a page register to select the correct page in order to access data on EEPROM

PLL

I'm not being able to LOCK the PLL..... Here's the code that works for the HCS12 with same hardware:

void HCS12_iniPLL (void){      SYNR = 5;           // 48Mhz @16MHz XTAL      REFDV = 3;                          // 48Mhz @16MHz XTAL            PLLCTL = 0xE0;                    // PLL ON - Auto Lock - CM ON            while(!CRGFLG_LOCK);      CRGFLG_LOCKIF = 1;      CRGINT_LOCKIE = 1;            CLKSEL_PLLSEL = 1;}

 It gets stuck waiting for CRGFLG_LOCK to be set

[kef]

Yes, you do not have to deal with page register, but... you should be avare of compiler option Code Generation->Assume objects are in the same page for. Default setting is "all objects in same non default segment". Actually it is meant that page switching may be done once for all objects in the same non default placement. In case you are uising multisegmenet placement like:

   pagedee INTO EEPROM_FC, EEPROM_FD;

, your code may fail when some objects will be allocated to EEPROM_FC, and others into EEPROM_FD. So either you need to not use multisegment placements, or switch above mentioned option to "never for different objects".

Regarding memory views in debugger. I don't know, maybe it is some CW4.6 bug. CW5 shows paged EEPROM correctly ( at least in simulator). Did you try to view paged EEPROM using global address? Logical address FD08B8'L corresponds to global 13F4B8'X. Try entering 13F4B8'X into Address.. edit box.

What's IVT? Vectors table? Vectors are listed in table 1-12 of MC9S12XD-Family datasheet.

BTW you can't remap S12X memories, there are no corresponding INITxx registers. Instead of this you can remap vectors table to different address using IVBR register.

[sebasira]

Thanks kef!!!

I didn't know about that Compiler option. And I've seen other options:

- DPAGE is used for pagging

- EPAGE is used for pagging

- GPAGE is used for pagging

- PPAGE is used for pagging

- RPAGE is used for pagging

I'm currently working with paged RAM, EEPROM and FLASH.... Do I need to enable them too? What are they for?

Yes, with IVT I ment the Interrupt Vector Table. Thank's for that!

I've no luck viewing the EEPROM with the Global Address... Actually that's bad, because it makes debugging much complicated... Could it be a clock setting? ECLKDIV is set to 0x49, because I'm working with a 16Mhz external clock... 

Currently I can't view memory from (logical addresses):

- FAC000 to FB1000

- FBC000 to FC1000

- FCC000 to FD1000

and so on... Does this give you a clue?

Thanks in advance!

[kef]

"xPAGE is used for paging" is used to change default address of EPAGE register. Default setting for EPAGE is 0x17, so you don't have to change it for S12XA.

ECLKDIV controls only timing of EEPROM erase and program. It doesn't affect reading from EEPROM.

No clue what could be wrong with debugger. What about trying if CW5.x special edition behaves better?

- FAC000 to FB1000

Hope you understand that FA_C000 is nonbanked flash and FB_0C00 is nonbanked EEPROM.

[StenS]

Note that the options "xPAGE is used for paging" also tells the compiler which PAGE-registers must be saved when entering an interrupt routine. Failing to specify the options for the PAGE-registers you use in your interrupts, will cause bugs that are very random and hard to find (until you realize that it is because of the PAGE-registers changing within an interrupt).

[kef]

Oh, that's right. But it is better to not use these options and avoid accessing paged variables from interrupt call tree. With xPAGE option, compiler may add page save/restore code to each ISR. This is safe, but slows down execution. It may be better to save/restore xPAGE by hand in selected interrupt handlers.

[sebasira]

Thank you both for your concern!! For now I'll leave that option unchecked and I won't work with paged data inside ISR's...

For now, I think I succesfully ported my project from S12 to S12X... There's only the EEPROM issue that I can not debug it, but routines read/write correctly...

About flash routines, the only difference was (as said by kef) the sector size. It's change from 512 to 1024.

Thank you all for helping me out!!!

[sebasira]

Thanks for the tip...

I test it with cw5.0 and it works fine... the problem is that I have no license for it, I'll need to get one, because I exceed code limitation

[sebasira]

>I'm not being able to LOCK the PLL..... Here's the code that works for the HCS12 with same hardware:

Well, I solve it... problem was the "same hardware" part... XTAL and EXTAL configuration differs

About paged data.. I'm still not sure if the page registers is automatically set or if I have to set it manually

[sebasira]

I have a problem when trying to see the EEPROM on memory component... I'm usign CW4.6.

I've attached an image of what it looks like.

Apparently read/write routines are working because I can correctly read/write... but I can't see it on the memory component.

Could you tell me why?

Thanks!

[sebasira]

One more thing... I can't find the S12XA IVT... any clues?

[sebasira]

Final question? Why I can't change the segment name??

It would be easier for me to organice if I could