MM912J637 - Interrupt on PTB3/L0 going high - possible?

[igw]

Hi all,

The MM912J637 has only one external interrupt possibility that I can see; PTB3/L0 can force a wake-up when the device is asleep.

What I want to know, though, is whether I can get an interrupt when this pin goes high even though the device is *already* awake.

I have tried but I am not getting a hit on the D2D interrupt with the expected interrupt vector value of 0x00.  I don't think I have a bug in the code but it is feasible.

If this is a limitation in the chip, it sort of half makes sense, but it is a significant limitation for me.  Not having an external interrupt has unpleasant repercussions throughout our system.

Is it feasible to fudge this using a Timer channel with a suitable capture configuration to generate interrupts on edges of PTB3?

Thanks,

Ian

[iggi · Accepted solution]

Hi,

Effectively the PTB3/L0 input is a wake-up input. Yet into normal mode (non low power), this function is disabled.

There, PTB3/L0 is a high voltage digital input.

The only way, a workaround, is to route PTB3/L0 pin to Timer Channel – Input Capture (GPIO_IN3 register; TCAPx bits) and then use Timer Interrupt.

Regards,
Ivan

[igw]

Thank you for your reply, Ivan.  I must say that this must be the first micro I have seen in 25 years+ without (direct) external interrupt capability.  I understand it is designed for a specific purpose and there are limited pins but it does seem rather limiting.

I did implement an interrupt by connecting it as a capture input but the latency is huge - I may have the capture config incorrect.  Something more to investigate later. (After I debug why the V and I channels are not synchronized correct after enabling them both with a single write to the ACQ_CTL register - but this may be the topic of a new thread.)

Again, thanks.

Ian