MC9S12XDP512 - Question about Modulus down Counter!!

[embedlov]

Hi all,

I am using the Modulus downcounter in the ECT of S12X MCU.

I use it in the non-modulus mode i.e. I load the counter with a desired value.

and give the prescale value.

In my program I want to use the timer consecutively.

The problem is the counter counts down to 0000 for the first time. but never start counting the second time even though i load the counter value again.

would anybody explain this?

Karthick

[Steve]

The MODMC bit in MCCTL decides if the counter is reloaded automatically or not.

[kef]

Yes, MODMC decides if the counter is reloaded automatically or not. And MODMC=0 is what could be called "non-modulus" ((c) OPs message) mode. Docs say that MODMC=1 is "Modulus mode is enabled", so I think that non-modulus is MODMC=0. Also OP says: "but never start counting the second time even though i load the counter value again.". This is exactly what I saw today in 9S12DG128 and 9S12XDT256 chips: when MODMC=0 it's impossible to make counter running again by writing to MCCNT. D60A allowed to make counter running again by writing to MCCNT.

[firefox005]

Hi Kef,

Thankx for your help and comments, now I tryed to compile to it with the new compiler S12X 4.7.12 ( new lkf File, vector_s12x, crtsx.s and MAKEFILE) and load the elf File with the Indart on.

 CLR_BIT(MCCTL,MCEN); //Modulus Down-counter EnableSET_BIT(MCCTL,MODMC);//Modulus Mode enableSET_BIT(MCCTL,RDMCL);//Read Modulus Down-Counter LoadSET_BIT(MCCTL,MCEN); //Modulus Down-counter EnableSET_BIT(MCCTL,FLMC);// Starte der CounterMCCNT = 12000;//(T_UI16)(FCPU/TASK_SUPERFASTTIMER);SET_BIT(MCCTL,MCZI);//Modulus Counter Underflow Interrupt Enable

 in the ISR, I clear the Interrupt Flag

CLR_FLAG(MCFLG, MCZF);

 the Problem is that the ISR allways called only one time,

I dont know, if there is a problem with the debuger indart one because, when I try to load the S19 file, I become the  warning: Error while writing to 7F4000..7F4200. Information: No memory at this address.

I think it s a problem with my const section:

+seg .const  -b 0x7F4000 -o 0x4000 -n .const     

the vector address is defined in the lkf file as bellow:

+seg .vector -b 0x7FFF10 -o 0xFF10 # vectors start address in der Firmware

thanks for help

[kef]

There are some differemces between old MC912D60A and newer S12 and S12X, but nonmodulus mode works on all parts. Differences from memory are these:

1. On S12/S12X downcount starts immediately after you write 4 (MODMC = 0, MCEN = 1) to MDC control register. On D60A downcount didn't start until you write to MCCNT.

2. On D60A it was enough to write to upper/lower byte of MCCNT. To start countdown on S12/S12X, you should write 16bits word to MCCNT at once

...

Sample code

//Initialize MDC

#define ModulusMode 0  // *0- non-modulus mode, single shot countdown
                                   // *1- modulus mode, periodic countdown
 

   MCCTL =   MCCTL_MCZI_MASK                    // interrupts enable
           | MCCTL_MODMC_MASK *ModulusMode                                  
           | MCCTL_MCEN_MASK  *1                  // enable MDC
           | 0  // prescaler

        ;

void interrupt VectorNumber_Vtimmdcu MDCU_ISR(void)
{
   // clear flag
   MCFLG = MCFLG_MCZF_MASK;
  
#if !ModulusMode
   // in non-modulus mode, write new countdown value
   MCCNT = 20000;
#endif

   PORTB ^= 0x80; // toggle the LED  
}

And regarding you trouble 

Error while writing to 7F4000..7F4200. Information: No memory at this address.

I'm not familiar with Cosmic and Softec, but sounds like Softec is trying to program something else than S12XD family member. Didn't you mix S12XD with S12D?

Message Edited by kef on 2009-06-29 04:50 PM

[kef]

Looks like either yet another errata or poor documentation. Old pre-S12 parts had quite different Module Down Counter.

In S12X (at least 0L15Y) and S12 (D64, DG128 and probably all other S12):

After reset MCCNT shows FFFF in counter. MCZF flasg is cleared. Writing 4 to MCCTL (MCEN=1, MODMC=0) enables the Modulo Down Counter (MDC) and immediately makes it counting down to zero. After counter reaches 0 MCZF flag gets set. Writes to MCCNT do update the load register but counter doesn't start. To make it counting one should write '1' to FLMC bit.

In 912D60(A) and 912DG128(A)

After reset MCCNT also shows FFFF in the counter. MCZF flag is cleared. Writing 4 to MCCTL (MCEN=1, MODMC=0) enables the MDC but doesn't make it counting. To make it counting one should write to MCCNT register or '1' to FLMC bit (MCCTL register).