How to config MPU register

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How to config MPU register

Contributor II


     I am using MPU mechanism in order to protect Pflash.The processor is MC9S12XEP100 and compile environment is Codewarrior. the global section which I want to protect is from 0x7FE000-0x7FFFFF,I want to set this section can not be config as fellows:

void mpu_init(void) {

    unsigned long low_addr=0x7FE000;

    unsigned long high_addr=0x7FFFFF;


    MPUDESC0=0x40|(low_addr>>19);       //CPU in user state   low_addr:22-19

    MPUDESC1= (unsigned char)((low_addr&0x7FFFF)>>11);//low_addr:18-11

    MPUDESC2= (unsigned char)((low_addr&0x7FF)>>3);//low_addr:10-2

    MPUDESC3= 0x80|(high_addr>>19);//WP NEX  high_addr:22-19

    MPUDESC4= (unsigned char)((high_addr&0x7FFFF)>>11);//high_addr:18-11

    MPUDESC5= (unsigned char)((high_addr&0x7FF)>>3);//high_addr:10-2

    MPUSEL=0x80|MPUSEL;    //SVSEN=1,SEL=01;


after config  I found the MPU can not work . I need your help .I could not Understand why we need to config SEL.


could you give me some advise or demo .

                                                            thank you!

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2 Replies

NXP Employee
NXP Employee

Hi 明超 戴,

You configured MSTR1 as 1. If this bit is set the descriptor is valid for bus master 1 (CPU in user state).

Do you really use MCU in user state (did you set U Control Bit in CCR register)?

If not, your MCU running in supervisor state and you should configure MSTR0 as 1 (MPUDESC0=0x80|(low_addr>>19);)

For more details about User state, please look at:

Why do we need to config SEL?

Because there is available 8 protection descriptors and you could configure various combinations for your protection scheme. The MPUDESC0—MPUDESC5 registers are the just window to one of eight target descriptors.

You could protect various ranges in RAM, Registers, Flash, … you could define rules for CPU in user/supervisor state or XGATE,….

Attached is simple MPU example code.

BTW: If you want to protect just whole Flash against write, why you didn’t use FPROT register feature?

The command FPROT=0xA4; will enable Full P-Flash Memory Protection.

Optionally you could store FPROT value at address 0xFF0C and this value will be loaded to FPROT registers automatically after every reset.

Note: There is the potential issue with double EEC fault. Please check document for more details.

I hope it helps you.

Have a great day,

Note: If this post answers your question, please click the Correct Answer button. Thank you!

Contributor II

Hi   Radek Sestak

       thank you for your help, I will try to it.

                     Best  regards!

                                                       Dai Mingchao

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