i have a custom design board using MPC8548. i am interested in configuring this processor as endpoint on one board and RC on other. i want to access DDR memory of RC from other processor which is configured as endpoint on other board.

[sheetalpurohit]

Does MPC8548 support EP to RC memory read and write. If yes, what are the various settings i need to do to implement this. This PCIe link between two processor is through PCIe switch. Please clarify.

[r8070z]

Have a great day,

Yes MPC8548 supports EP to RC memory read and write.

As you know the MPC8548 local memory map of the internal 36-bit address space is defined by a set of local access windows. Each of these windows maps address region to a particular target interface, such as the DDR SDRAM controller, the PCIe controller and so on. The PCIe controller has Outbound ATMU windows to perform the mapping from the local 36-bit address space to the PCIe address spaces address space and Inbound ATMU windows to perform the address translation from the external address space to the local.

So RC has to

configure the RC PCIe port inbound window which maps some PCIe address region (Apcie) to the internal memory physical address region (Aep). This Aep has to be inside of region of the local window which maps the RC memory.

configure EP PCIe port outbound window which maps some EP physical address region (Aep) to the PCIe address region Apcie. The EP PCIe local window has to be configured for the Aep too.

  As result when the EP internal master like DMA or Core accesses to address inside Aep it will access to the RC memory (Aep->Apcie->Arc).

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