defining and using MSI at Linux at B4860

[ihaymov]

Hello.

We have an old Linux Kernel (3.8.13) build from SDK2.0 of the B4860 (QorIQ chipset) and have a PCIe MSI based EP which we would like to enable an MSI with it.

We should use the deprecated API of the PCI interrupt since new API of interrupt do not exists prior to 3.8.13 Kernel.

This mean that pci_enable_msi(*) was used to activate one IRQ MSI.

at Configuration Space (CS) this changes the LSBs MSI-Control Register from 0xA to 0xB (32 messages + enable - correct value).

As we see at CS the Message Address (Low and High) were not allocated - we don;t want to allocate it manually. Also the Message Data Register (16 bits) was not set as well (value: 0x0).

Also ,we have a Kernel running at  64 bit PPC linux OS but somehow the 64-bit Address Capable is OFF (means only 32 bit address vs. 64 bit data).

Regarding the Device Tree of our target: 

when typing:

# cat /proc/device-tree/compatible

we have:

fsl,B4860QDS configuration - is it enough for to implement the MSI on it?

How we should implement the MSI on this platform given all the information we gave?

[ihaymov]

Thank you very much Yiping.

We were able to activate only one MSI interrupt (ID no. 0x0). The configuration was done manually, in partial:

1. At the kernel driver we do use the pci_enable_msi() to enable the MSI - and only one msi_irq is enabled...

2. We can see this at the system files: /sys/bus/pci/devices/0000\:01\:00,0/msi_irq

(we see no. 46)

3. We requester the IRQ ID using the number we found at previous stage (46) using request_irq() API.

4. This is the part where we had to configure the following registers at the host (using devmem utility):

   a. MSI inbound window base address register

   b. MSI inbound window attribute register

5. Lastly, at the kernel driver,  we wrote into the Configuration Space register of the EP (endpoint), at the address of the MSI the address matched to the inbound address registers.

Then only one MSI interrupt could be triggered - 

My question: How we can do multiple MSI interrupts?

Thank you very much for your help!

Best,

I.C.

[yipingwang]

Hello Itzik Chaimov,

1. In your device driver of PCIe device, call pci_enable_msi to enable it.

A successful call allocates ONE interrupt to the device, regardless of how many MSIs the device supports.  The device is switched from pin-based interrupt mode to MSI mode.  The dev->irq number is changed to a new number which represents the message signaled interrupt; consequently, this function should be called before the driver calls request_irq(), because an MSI is delivered via a vector that is different from the vector of a pin-based interrupt.

You could refer to "e1000_test_msi_interrupt" in drivers/net/ethernet/intel/e1000e/netdev.c.

        err = pci_enable_msi(adapter->pdev);
        if (err)
                goto msi_test_failed;

        err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
                          netdev->name, netdev);
        if (err) {
                pci_disable_msi(adapter->pdev);
                goto msi_test_failed;
        }

2.Enable CONFIG_PCI_MSI in Linux Kernel configuration file.

In the dts file, qoriq-mpic4.3.dtsi has already been include in b4si-post.dtsi, which includes the following section.

The kernel will use one of  interrupts as physical interrupt number, which defined in"msi@41600"

msi0: msi@41600 {
        compatible = "fsl,mpic-msi-v4.3";
        reg = <0x41600 0x200 0x44148 4>;
        interrupts = <
                0xe0 0 0 0
                0xe1 0 0 0
                0xe2 0 0 0
                0xe3 0 0 0
                0xe4 0 0 0
                0xe5 0 0 0
                0xe6 0 0 0
                0xe7 0 0 0
                0x100 0 0 0
                0x101 0 0 0
                0x102 0 0 0
                0x103 0 0 0
                0x104 0 0 0
                 0x105 0 0 0
                0x106 0 0 0
                0x107 0 0 0>;
};

3.  Please check your kernel code to identify how the kernel to allocate one of MSI interrupts for your PCIe device. And how the kernel to write"MSI Message Address"and"MSI Message Data"in PCIe configuration space of your device in function fsl_setup_msi_irqs() in arch/powerpc/sysdev/fsl_msi.c.

Thanks,

Yiping