Trying to Integrate PCIexpress telephony cards on p2020 board

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Trying to Integrate PCIexpress telephony cards on p2020 board

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mohitduggal
Contributor II

But i was trying to Open Vox  PCie card on the p2020 board but it is not detecting the card. dahdi drivers are installed. but dahdi_hardware does not find that card.

When i run lspci -v the following output comes :

0000:00:00.0 PCI bridge: Freescale Semiconductor Inc P2020E (rev 21) (prog-if 00 [Normal decode])
        Flags: bus master, fast devsel, latency 0
        Memory at <ignored> (32-bit, non-prefetchable)
        Bus: primary=00, secondary=01, subordinate=01, sec-latency=0
        I/O behind bridge: 00000000-00000fff
        Memory behind bridge: a0000000-bfffffff
        Capabilities: [44] Power Management version 2
        Capabilities: [4c] Express Root Port (Slot-), MSI 00
        Capabilities: [100] Advanced Error Reporting
lspci: Unable to load libkmod resources: error -12

0000:01:00.0 Mass storage controller: Silicon Image, Inc. SiI 3132 Serial ATA Raid II Controller (rev 01)
        Subsystem: Silicon Image, Inc. SiI 3132 Serial ATA Raid II Controller
        Flags: bus master, fast devsel, latency 0, IRQ 24
        Memory at a0000000 (64-bit, non-prefetchable) [size=128]
        Memory at a0004000 (64-bit, non-prefetchable) [size=16K]
        I/O ports at 1000 [size=128]
        [virtual] Expansion ROM at a0080000 [disabled] [size=512K]
        Capabilities: [54] Power Management version 2
        Capabilities: [5c] MSI: Enable- Count=1/1 Maskable- 64bit+
        Capabilities: [70] Express Legacy Endpoint, MSI 00
        Capabilities: [100] Advanced Error Reporting
        Kernel driver in use: sata_sil24

0001:02:00.0 PCI bridge: Freescale Semiconductor Inc P2020E (rev 21) (prog-if 00 [Normal decode])
        Flags: bus master, fast devsel, latency 0
        Memory at <ignored> (32-bit, non-prefetchable)
        Bus: primary=00, secondary=03, subordinate=03, sec-latency=0
        I/O behind bridge: 00000000-00000fff
        Memory behind bridge: 80000000-9fffffff
        Capabilities: [44] Power Management version 2
        Capabilities: [4c] Express Root Port (Slot-), MSI 00
        Capabilities: [100] Advanced Error Reporting

A quick response will be highly appreciated.

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adeel
Contributor III

Hi Mohit,

Are you still working on the project? If you need more information about our product then please inbox me. My email address is madeel.sharif@gmail.com

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ufedor
NXP TechSupport
NXP TechSupport

Please provide additional information:

1) P2020 to the PCIe card connection schematics as PDF

2) values of the PORBMSR and PORDEVSR

3) U-Boot booting log

4) measured frequency of the reference clock provided to the PCIe card

Please consider that it could be more convenient to create a Technical Case:

https://community.freescale.com/thread/381898

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mohitduggal
Contributor II

Please find below the answer to queries :

1) P2020 to the PCIe card connection schematics as PDF

It is P2020rdb development board from freescale which supports single x1 PCIe slot. PCIe car is inserted in that slot. 

) values of the PORBMSR and PORDEVSR

How to find these values ?

3) U-Boot booting log

How to get U-boot Log

4) measured frequency of the reference clock provided to the PCIe card

how to find these values ?

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ufedor
NXP TechSupport
NXP TechSupport

1), 4) - not actual for the P2020RDB.

2) The requested log is printed by U-Boot on the console during the board booting.

3) Execute U-Boot command 'md ffee0000' and provide the log.

5) What are settings of all on-board switches?

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mohitduggal
Contributor II

Hi ufedor ,

PFB the U-boot logging during bootup :

U-Boot 2013.01-00115-g831b30d (Jun 14 2013 - 21:48:56)

CPU0:  P2020E, Version: 2.1, (0x80ea0021)

Core:  E500, Version: 5.1, (0x80211051)

Clock Configuration:

       CPU0:1200 MHz, CPU1:1200 MHz,

       CCB:600  MHz,

       DDR:400  MHz (800 MT/s data rate) (Asynchronous), LBC:37.500 MHz

L1:    D-cache 32 kB enabled

       I-cache 32 kB enabled

Board: P2020RDB-PCA CPLD: V4.2 PCBA: V4.0

rom_loc: nor upper bank

SD/MMC : 4-bit Mode

eSPI : Enabled

I2C:   ready

SPI:   ready

DRAM:  Detected UDIMM

1 GiB (DDR3, 64-bit, CL=6, ECC off)

Flash: 16 MiB

L2:    512 KB enabled

NAND:  128 MiB

MMC:  FSL_SDHC: 0

PCIe1: Root Complex of mini PCIe SLOT, no link, regs @ 0xffe0a000

PCIe1: Bus 00 - 00

PCIe2: Root Complex of PCIe SLOT, x1, regs @ 0xffe09000

  02:00.0     - 10b5:8112 - Bridge device

   03:00.0    - e159:0001 - Simple comm. controller

PCIe2: Bus 01 - 03

In:    serial

Out:   serial

Err:   serial

Net:   eTSEC2 is in sgmii mode.

uploading VSC7385 microcode from ef000000

PHY reset timed out

eTSEC1, eTSEC2, eTSEC3

2. Output of md ffee0000 as below :

=> md ffee0000

ffee0000: 4444180c 8f370000 00000000 0a713847    DD...7.......q8G

ffee0010: 05000000 8bff27f0 00000000 00000000    ......'.........

ffee0020: 00010000 00000000 00000000 00000000    ................

ffee0030: 00000000 00000000 00000000 00000000    ................

ffee0040: 00000000 00000000 00000000 00000000    ................

ffee0050: 00000000 00000000 00000000 00000000    ................

ffee0060: 60000000 00000000 00000000 00000000    `...............

ffee0070: 02080000 00000000 00000000 00000000    ................

ffee0080: 00000000 00000000 00000000 000000e0    ................

ffee0090: 00000000 00000000 00000000 0000c000    ................

ffee00a0: 80211051 80ea0021 00000010 00000000    .!.Q...!........

ffee00b0: 00000000 00000000 00000000 00000000    ................

ffee00c0: 00000331 00000000 00000000 00000000    ...1............

ffee00d0: ffff0000 00000000 00000000 00000000    ................

ffee00e0: 00000000 00000000 00000000 00000000    ................

ffee00f0: 00000000 00000000 00000000 00000000    ................

3. Settings of all On-board Switches

DIP Switch SW 2:

SW2[1]= OFF

SW2[2-8]= ON

DIP Switch SW 3:

SW3[1-2]= ON

SW3[3-4]= OFF

SW3[5]= ON

SW3[6]= OFF

SW3[7]= ON

SW3[8]= OFF

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ufedor
NXP TechSupport
NXP TechSupport

From the log:

PCIe2: Root Complex of PCIe SLOT, x1, regs @ 0xffe09000

  02:00.0     - 10b5:8112 - Bridge device

   03:00.0    - e159:0001 - Simple comm. controller

Which exactly device is not discovered - i.e. what are its Device ID and Vendor ID?

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mohitduggal
Contributor II

Finally device is detected , i just gave pci command on u-boot

the output is as follows :

root@p2020rdb:/lib/modules/3.12.19-rt30-QorIQ-SDK-V1.7+g6619b8b# lspci -v

0000:00:00.0 PCI bridge: Freescale Semiconductor Inc P2020E (rev 21) (prog-if 00 [Normal decode])

    Flags: bus master, fast devsel, latency 0

    Memory at <ignored> (32-bit, non-prefetchable)

    Bus: primary=00, secondary=01, subordinate=02, sec-latency=0

    I/O behind bridge: 00000000-00000fff

    Memory behind bridge: a0000000-bfffffff

    Capabilities: [44] Power Management version 2

    Capabilities: [4c] Express Root Port (Slot-), MSI 00

    Capabilities: [100] Advanced Error Reporting

lspci: Unable to load libkmod resources: error -12

0000:01:00.0 PCI bridge: PLX Technology, Inc. PEX8112 x1 Lane PCI Express-to-PCI Bridge (rev aa) (prog-if 00 [Normal decode])

    Flags: bus master, fast devsel, latency 0

    Bus: primary=01, secondary=02, subordinate=02, sec-latency=0

    I/O behind bridge: 00001000-00001fff

    Memory behind bridge: a0000000-a00fffff

    Capabilities: [40] Power Management version 2

    Capabilities: [50] MSI: Enable- Count=1/1 Maskable- 64bit+

    Capabilities: [60] Express PCI-Express to PCI/PCI-X Bridge, MSI 00

    Capabilities: [100] Power Budgeting <?>

0000:02:00.0 Communication controller: Tiger Jet Network Inc. Tiger3XX Modem/ISDN interface

    Subsystem: OpenVox Communication Co. Ltd. OpenVox A400P 4-port analog card

    Flags: bus master, medium devsel, latency 128, IRQ 24

    I/O ports at 1000 [size=256]

    Memory at a0000000 (32-bit, non-prefetchable) [size=4K]

    Capabilities: [40] Power Management version 2

0001:03:00.0 PCI bridge: Freescale Semiconductor Inc P2020E (rev 21) (prog-if 00 [Normal decode])

    Flags: bus master, fast devsel, latency 0

    Memory at <ignored> (32-bit, non-prefetchable)

    Bus: primary=00, secondary=04, subordinate=04, sec-latency=0

    I/O behind bridge: 00000000-00000fff

    Memory behind bridge: 80000000-9fffffff

    Capabilities: [44] Power Management version 2

    Capabilities: [4c] Express Root Port (Slot-), MSI 00

    Capabilities: [100] Advanced Error Reporting

But when i am trying to use dahdi_genconf  the following error comes :

root@p2020rdb:/lib/modules/3.12.19-rt30-QorIQ-SDK-V1.7+g6619b8b# dah di_genconf

Can't locate Getopt/Long.pm in @INC (@INC contains: /usr/sbin /usr/sbin/perl_modules /etc/perl /usr/lib/perl/site_perl/5.14.3/ /usr/lib/perl/site_perl/5.14.3 /usr/lib/perl/vendor_perl/5.14.3/ /usr/lib/perl/vendor_perl/5.14.3 /usr/lib/perl/5.14.3/ /usr/lib/perl/5.14.3 /usr/local/lib/site_perl /usr/lib/perl/5.14.3 .) at /usr/sbin/dahdi_genconf line 14.

BEGIN failed--compilation aborted at /usr/sbin/dahdi_genconf line 14.

my perl -V cmd also gives right output

root@p2020rdb:/lib/modules/3.12.19-rt30-QorIQ-SDK-V1.7+g6619b8b# perl -v

This is perl 5, version 14, subversion 3 (v5.14.3) built for powerpc-linux-gnuspe

Copyright 1987-2012, Larry Wall

Perl may be copied only under the terms of either the Artistic License or the

GNU General Public License, which may be found in the Perl 5 source kit.

Complete documentation for Perl, including FAQ lists, should be found on

this system using "man perl" or "perldoc perl".  If you have access to the

Internet, point your browser at http://www.perl.org/, the Perl Home Page.

root@p2020rdb:/lib/modules/3.12.19-rt30-QorIQ-SDK-V1.7+g6619b8b# perl -v   V

Warning: failed to load Config_git.pl, something strange about this perl...

Summary of my perl5 (revision 5 version 14 subversion 2) configuration:

  undef undef

  Platform:

    osname=linux, osvers=2.6.37-rc5-yocto-standard+, archname=powerpc-linux-gnuspe

    uname='linux qemux86 2.6.37-rc5-yocto-standard+ #1 preempt mon dec 20 14:21:27 pst 2010 i686 gnulinux '

    config_args='-des -Doptimize=-O2 -Dmyhostname=localhost -Dperladmin=root@localhost -Dcc=gcc -Dcf_by=Open Embedded -Dinstallprefix=/usr -Dprefix=/usr -Dvendorprefix=/usr -Dsiteprefix=/usr -Dotherlibdirs=/usr/lib/perl/5.14.3 -Duseshrplib -Dusethreads -Duseithreads -Duselargefiles -Ud_dosuid -Dd_semctl_semun -Ui_db -Ui_ndbm -Ui_gdbm -Di_shadow -Di_syslog -Dman3ext=3pm -Duseperlio -Dinstallusrbinperl -Ubincompat5005 -Uversiononly -Dpager=/usr/bin/less -isr'

    hint=recommended, useposix=true, d_sigaction=define

    useithreads=define, usemultiplicity=define

    useperlio=define, d_sfio=undef, uselargefiles=define, usesocks=undef

    use64bitint=undef, use64bitall=undef, uselongdouble=undef

    usemymalloc=n, bincompat5005=undef

  Compiler:

    cc='powerpc-fsl-linux-gnuspe-gcc  -m32 -mcpu=8548 -mabi=spe -mspe -mfloat-gprs=double ', ccflags =' -O2 -pipe -g -feliminate-unused-debug-types -DDEBIAN -D_REENTRANT -D_GNU_SOURCE -fno-strict-aliasing -pipe -fstack-protector -D_LARGEFILE_SOURCE -D_FILE_OFFSET_BITS=64',

    optimize='-O2',

    cppflags='-fno-strict-aliasing'

    ccversion='', gccversion='4.5.1', gccosandvers=''

    intsize=4, longsize=4, ptrsize=4, doublesize=8, byteorder=4321

    d_longlong=define, longlongsize=8, d_longdbl=define, longdblsize=12

    ivtype='long', ivsize=4, nvtype='double', nvsize=8, Off_t='off_t', lseeksize=8

    alignbytes=4, prototype=define

  Linker and Libraries:

    ld='powerpc-fsl-linux-gnuspe-gcc  -m32 -mcpu=8548 -mabi=spe -mspe -mfloat-gprs=double ', ldflags ='-Wl,-O1 -Wl,--hash-style=gnu -Wl,--as-needed -fstack-protector'

    libpth=/lib /usr/lib

    libs=-lnsl -lgdbm -ldb -ldl -lm -lcrypt -lutil -lpthread -lc

    perllibs=-lnsl -ldl -lm -lcrypt -lutil -lpthread -lc

    libc=/lib/libc-2.12.1.so, so=so, useshrplib=true, libperl=libperl.so

    gnulibc_version='2.12.1'

  Dynamic Linking:

    dlsrc=dl_dlopen.xs, dlext=so, d_dlsymun=undef, ccdlflags='-Wl,-E -Wl,-rpath,/usr/lib/perl/5.14.3//CORE'

    cccdlflags='-fPIC', lddlflags='-Wl,-O1 -Wl,--hash-style=gnu -Wl,--as-needed -fstack-protector -shared'

Characteristics of this binary (from libperl):

  Compile-time options: MULTIPLICITY PERL_DONT_CREATE_GVSV

                        PERL_IMPLICIT_CONTEXT PERL_MALLOC_WRAP

                        PERL_PRESERVE_IVUV USE_ITHREADS USE_LARGE_FILES

                        USE_PERLIO USE_PERL_ATOF USE_REENTRANT_API

  Built under linux

  Compiled at Apr 29 2016 21:26:10

  @INC:

    /etc/perl

    /usr/lib/perl/site_perl/5.14.3/

    /usr/lib/perl/site_perl/5.14.3

    /usr/lib/perl/vendor_perl/5.14.3/

    /usr/lib/perl/vendor_perl/5.14.3

    /usr/lib/perl/5.14.3/

    /usr/lib/perl/5.14.3

    /usr/local/lib/site_perl

    /usr/lib/perl/5.14.3

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ufedor
NXP TechSupport
NXP TechSupport

In the original description you wrote:

> i was trying to Open Vox  PCie card on the p2020 board but it is not detecting the card.

The card is now detected, so I believe that the issue is resolved and this thread has to be closed.

Please create new question for the new issue if you consider that it is connected with NXP/Freescale hardware or Linux SDK.

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mohitduggal
Contributor II

Since integration is not complete thus issue is still open. As i am unable to use the card without dahdi

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ufedor
NXP TechSupport
NXP TechSupport

Where in the Freescale's Linux SDK the "dahdi" is located?

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mohitduggal
Contributor II

Hi ufedor ,

  The issue seems to be linux kernel is installed is coming out to be 3.8.13 whereas my dahdi has been compiled with 3.12. I have used SDK 1.7 for building the complete linux image with dahdi . BUT kernel is always coming 3.8 as per below log though i have recompiled the kernel using following steps but still there is no change.

## Booting kernel from Legacy Image at ef080000 ...

   Image Name:   Linux-3.8.13-rt9-QorIQ-SDK-V1.4

   Created:      2013-06-17   8:01:35 UTC

   Image Type:   PowerPC Linux Kernel Image (gzip compressed)

   Data Size:    3602933 Bytes = 3.4 MiB

   Load Address: 00000000

   Entry Point:  00000000

   Verifying Checksum ... OK

   Uncompressing Kernel Image ... OK

please help seems to be very close to cracking it .

thanks in advance .

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adeel
Contributor III

Hello Mohit,

We have a QorIQ based solution for Asterisk which is supporting 8 E1/T1 interfaces. You could try to redo everything and I will be happy to assist or you can get a complete solution which will save your time and effort.

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mohitduggal
Contributor II

Please share the details of solution already implemented. 

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thomasculverhou
Contributor III

Hi,

I had a similar problem with an NVMe hard disk on an LS2085A - drivers installed into the kernel, but the device isn't detected. I'm drawing a few (potentially incorrect) parallels between the P2020 and the LS2085A here, but:

How many lanes does your OpenVox PCIe card require? Are your PCIe slots on the P2020 configured correctly for the number of lanes on your OpenVox card?

Have you checked your SerDes configuration? In the LS2085A, the SerDes configuration can be tailored to support different numbers of lanes in each PCIe slot and you have to generate an RCW (reset configuration word) which reflects the configuration you want. The RCW is part of a PBL.bin file which is then uploaded to the board.

Looking in the QCVS tool, I created a default P2020 configuration project with DDR, HWDeviceTree and BOOTROM components. In the BOOTROM configuration Properties tab, the Power-On Reset Configuration contains a SerDes Configuration drop-down where you can inspect the Ref Clock, PLL timout, I/O port selection. It looks like the I/O port selection defaults to 0b1111, corresponding to

PCIe1 - 2 lanes

PCIe2 - 1 lane

PCIe3 - 1 lane

Which slot is your OpenVox card in? Based on your lspci output I presume you have a hard disk in PCIe2. Is it possible that the OpenVox card requires more PCIe lanes than is provided by the slot it is plugged into?

Also, is the device recognised in u-boot? There should be some lines like

PCIe1: Root Complex no link, regs @ 0x3600000

PCIe2: Root Complex no link, regs @ 0x3700000

PCIe3: disabled

What do these lines look like for your board?

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ufedor
NXP TechSupport
NXP TechSupport

Please note that P2020 and LS2085A have absolutely different SerDes architectures.

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