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T1024 eSPI NOR-Flash

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T1024 eSPI NOR-Flash

‎10-15-2018 05:08 AM
1,074 Views
roberto_brega
Contributor I

I am implementing an eSPI -> NOR-Flash driver for a custom RTOS. By parsing the Core Manual (T1024_RM_rev1_201809.pdf), the Application Notes (AN4375.pdf), the NOR-Flash part manual (S25FL032P_00.pdf), and the U-Boot sources I was able to correctly issue the READ (03h) and READ_ID (90h) commands and receive the replies. 

However, I am stuck trying to write (WREN, RDSR, P4E, PP) the Flash.

I believe the issue is that I do not issue a command with no address arguments correctly and I am looking for an example that shows (with raw memory peeks and pokes) how to:

1) Issue a WREN command

2) Verify its correct execution in the Status Register, via RDSR command. 

3) Issue a page erase command (P4E) at a given address

As an example, please consider my exercises with U-Boot. 

1) NOR-FLASH <- WRITE ENABLE
=> mm.l 0xfe110004 # clear any previous events
fe110004: 00000000 ? 0xffffffff
=> mm.l 0xfe110000 # configure SPMODE (normal operation, eSPI enabled), , SPMODE1 no change from U-Boot defaults (e.g. 8-bits word)
fe110000: 00000000 ? 0x8000100f
=> mm.l 0xfe110010 # write WREN (0x06) in SPITF
fe110010: 00000000 ? 0x06000000
=> mm.l 0xfe11000c # configure SPCOM so that 1 byte is skipped (opcode), tranlen = 1 (out) + 0 (in) - 1 = 0
fe110010: 00000000 ? 0x00010000   # no way to know if it went through without reading the SR
2) NOR-FLASH <- READ SR
=> mm.l 0xfe110004 # clear any previous events
fe110004: 00000000 ? 0xffffffff
=> mm.l 0xfe110000 # configure SPMODE (normal operation, eSPI enabled), , SPMODE1 no change from U-Boot defaults (e.g. 8-bits word)
fe110000: 00000000 ? 0x8000100f
=> mm.l 0xfe110010 # write RDSR (0x05) in SPITF
fe110010: 00000000 ? 0x05000000
=> mm.l 0xfe11000c # configure SPCOM so that 1 byte is skipped (opcode), tranlen = 1 (out) +1 (in) - 1 = 1
fe110010: 00000000 ? 0x00010001
=> md.l 0xfe110014 # read SPIRF (should contain SR in the MSB)
fe110014: 00xxxxxx # no change in SR (although I am sure that this 00 is also not kosher)

What am I doing wrong? Is there a sharp eyed viewer that can point me in the right direction?

Thanks

--Roberto

P.S. Please consider that the following sequence works in U-Boot

E) NOR-FLASH <- READ-ID [WORKS]
 
=> mm.l 0xfe110004 # clear any previous events
fe110004: 00000000 ? 0xffffffff
=> mm.l 0xfe110000 # configure SPMODE (normal operation, eSPI enabled), SPMODE1 no change from U-Boot defaults (e.g. 8-bits word)
fe110000: 00000000 ? 0x8000100f
=> mm.l 0xfe110010 # write RD-ID (0x90) in SPITF, followed by 0x000000 address (as described by part manual)
fe110010: 00000000 ? 0x90000000
=> mm.l 0xfe11000c # configure SPCOM so that 4 byte are skipped (opcode+24bit address), tranlen = 4 (out) + 2 (in) - 1 = 5
fe110010: 00000000 ? 0x00040005
=> md.l 0xfe110014 # read SPIRF (should contain device ID and vendor ID in the first two MSBs)
fe110014: 0115xxxx # correct device and vendor id
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‎02-12-2019 04:19 AM
793 Views
rajeshpuppala
Contributor I
1) NOR-FLASH <- WRITE ENABLE
=> mm.l 0xfe110004 # clear any previous events
fe110004: 00000000 ? 0xffffffff
=> mm.l 0xfe110000 # configure SPMODE (normal operation, eSPI enabled), , SPMODE1 no change from U-Boot defaults (e.g. 8-bits word)
fe110000: 00000000 ? 0x8000100f
=> mm.l 0xfe110010 # write WREN (0x06) in SPITF
fe110010: 00000000 ? 0x06000000
=> mm.l 0xfe11000c # configure SPCOM so that 1 byte is skipped (opcode), tranlen = 1 (out) + 0 (in) - 1 = 0
fe110010: 00000000 ? 0x00010000   # no way to know if it went through without reading the SR
2) NOR-FLASH <- READ SR
=> mm.l 0xfe110004 # clear any previous events
fe110004: 00000000 ? 0xffffffff
=> mm.l 0xfe110000 # configure SPMODE (normal operation, eSPI enabled), , SPMODE1 no change from U-Boot defaults (e.g. 8-bits word)
fe110000: 00000000 ? 0x8000100f
=> mm.l 0xfe110010 # write RDSR (0x05) in SPITF
fe110010: 00000000 ? 0x05000000
=> mm.l 0xfe11000c # configure SPCOM so that 1 byte is skipped (opcode), tranlen = 1 (out) +1 (in) - 1 = 1
fe110010: 00000000 ? 0x00010001
=> md.l 0xfe110014 # read SPIRF (should contain SR in the MSB)
fe110014: 00xxxxxx # no change in SR (although I am sure that this 00 is also not kosher)
i above piece of code will work 100 percent when after write enable please add the following 
e110000: 00000000 ? 0x0000100f
then execute the READ SR 
it will work 
thanks 
With regards 
Rajesh Puppala
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‎02-11-2019 02:46 AM
793 Views
rajeshpuppala
Contributor I

i am following the same above still not working please let me know on this how to correct

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‎10-31-2018 03:05 AM
793 Views
Pavel
NXP Employee
NXP Employee

Look at SDK 1.9 u-boot source code. This SDK supports SPI flash using eSPI controller.

See eSPI driver code from this SDK in the attached file.


Have a great day,
Pavel Chubakov

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eSPI.zip
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