Ethernet error(Tx buffer not ready) on T1042

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Ethernet error(Tx buffer not ready) on T1042

416 Views
shekhar_s
Contributor I

Hi All,

I am working on a custom board with reference as T1042D4RDB, currently I'm facing an issue with ethernet in u-boot.

I have configured MAC 4 and 5 as RGMII, as in T1042D4RDB. I have PHY with addresses 0x02 and 0x03 for MAC 4 (FM@DTSEC4) and 5 (FM@DTSEC5) respectively.

When I try to ping host PC (192.168.2.1) using FM@DTSEC5, it gives the error "Tx buffer not ready".

Can anyone please help me?

Thanks in advance for all your help

U-Boot 2019.07 (Dec 11 2019 - 19:45:25 +0530)
 
CPU0:  T1042E, Version: 1.1, (0x85280211)
Core:  e5500, Version: 2.1, (0x80241021)
Clock Configuration:
       CPU0:1200 MHz, CPU1:1200 MHz, CPU2:1200 MHz, CPU3:1200 MHz,
       CCB:500  MHz,
       DDR:533.333 MHz (1066.667 MT/s data rate) (Asynchronous),
       IFC:250  MHz
       QE :250  MHz
       FMAN1: 500 MHz
       QMAN:  250 MHz
       PME:   250 MHz
L1:    D-cache 32 KiB enabled
       I-cache 32 KiB enabled
Reset Configuration Word (RCW):
       00000000: 0a10000c 0c000000 00000000 00000000
       00000010: 06000002 c0000002 ec027000 01000000
       00000020: 00000000 00010001 60000000 00028000
       00000030: 00000200 00165005 00000000 00000000
Board: T1042
I2C:   ready
DRAM:  Initializing DDR....
Configuring DDR for 1066.667 MT/s data rate
Setting DDR register values...
Setting DDR register values finished...
2 GiB left unmapped
 
SDRAM test phase 1:
SDRAM test phase 2:
SDRAM test passed.
2 GiB (DDR4, 64-bit, CL=12, ECC on)
Flash: 512 MiB
L2:    256 KiB enabled
Corenet Platform Cache: 256 KiB enabled
Using SERDES1 Protocol: 6 (0x6)
Enabling all cpus
MMC:   FSL_SDHC: 0
Loading User and Factory Environments...
Firmware 'Microcode version 0.0.1 for T1040 r1.0' for 1040 V1.0
QE: uploading microcode 'Microcode for T1040 r1.0' version 0.0.1
In:    serial
Out:   serial
Err:   serial
SERDES Reference : 0x6
Temperature init Done
 
*** Warning - U-boot image is Updated
 
Net:   Initializing Fman
Fman1: Uploading microcode version 106.4.14
FM1@DTSEC4 [PRIME], FM1@DTSEC5
Hit any key to stop autoboot:  0
=>
=>
=> mii info
PHY 0x02: OUI = 0x1374, Model = 0x07, Rev = 0x04, 1000baseX, HDX
PHY 0x03: OUI = 0x1374, Model = 0x07, Rev = 0x04, 1000baseX, HDX
=> ping 192.168.2.1
FM1@DTSEC4 Waiting for PHY auto negotiation to complete......... TIMEOUT !
FM1@DTSEC4: Could not initialize
Using FM1@DTSEC5 device
 
ARP Retry count exceeded; starting again
ping failed; host 192.168.2.1 is not alive
=> ping 192.168.2.1
Using FM1@DTSEC5 device
FM1@DTSEC5: Tx error, txbd->status = 0x8800
FM1@DTSEC5: Tx buffer not ready, txbd->status = 0x8800
FM1@DTSEC5: Tx buffer not ready, txbd->status = 0x8800
FM1@DTSEC5: Tx buffer not ready, txbd->status = 0x8800
 
ARP Retry count exceeded; starting again
ping failed; host 192.168.2.1 is not alive
=>

2 Replies

202 Views
bpe
NXP TechSupport
NXP TechSupport

There can be several potential reasons for that, but most typically,
FMAN does not handle buffers because there is no clocks on the interface.
If the interface is RGMII, the first thing to check is that
EC1_GTX_CLK125, EC2_GTX_CLK125 signals are active and do reach their
pins.

Hope this helps,

Platon

202 Views
shekhar_s
Contributor I

Hi Platon,

Thank you for your reply.

What you mentioned is correct, after debugging we found that 125MHz is not received on the EC1_GTX_CLK125 and  EC2_GTX_CLK125 due to some hardware issue.

I will update you once the issue is resolved.

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