Processor Expert creates incorrect MUX value for Kinetis FlexBus

[leccy]

I have tried to implement a FlexBus on CW10.1 with PE for Kinetis K20.

The code generated in cpu.c when the RW pin is enabled tried to set MUX[4] for the FB_RW_b pin.  According to the data sheets, this should be MUX[5], along with all the other FlexBus pins.  I cannot find a reference to this in any errata.

leccy

[ProcessorExpert · Accepted solution]

Hello,

we are sorry for the invonvenience. We will fix it within CW V10.2 update. For now as workaround please add the following row after calling PE_low_level_init:

  /* PORTC_PCR11: ISF=0,MUX=5 */
  PORTC_PCR11 = (uint32_t)((PORTC_PCR11 & (uint32_t)~0x01000200UL) | (uint32_t)0x0500UL);

best regards
Vojtech Filip
Processor Expert Support Team

[leccy]

Thanks for the quick reply.

Would you also know why the P&E OSJTAG debugger gives a memory error if i configure the FlexBus in PE, and try to debug the project?

leccy