Reg Decrementer not working on Bare Board (With No OS)

[vijaykishore]

Hi all,

Reference docmunets for the following Doubt:

1. MPC8548ERM - Reference manual available on net.

2. E500CORERM - E500 Core Ref Manual available on net.

　

ISSUE:

I am using MPC8548E processor based customized board. U-Boot is loaded on it as boot loader.

From there I want to run my standalone applications.

I am able to run small applications like Hello_World.

Now I am working on Decrementer module which is supported by MPC8548E. I am trying to generate an interrupt after every certain period of time (say 100ms).

I am loading the DEC register and setting the corresponding registers to enable the timer to start. The list of registers which I am using for this module are:

TCR, TSR, DEC, DECAR, HID0, IVOR10 and IVPR.

Along with that I just checked DEVDISR register. The value it returned is: 0xD0000010, saying the Time base facilities are already enabled. I am able to access and modify all the registers. Decrementer will have to generate an interrupt once it counts down to 0. But this is not happening. My Interrupt handler is located at the address which is specified by IVOR10 and IVPR registers.

Decrementer interrupt is not generated, so it is not entering ISR.

Please help me in this regard, as it is important to proceed further.

[scottwood]

Is MSR[EE] set?  What are the contents of TCR?  Do you see TSR[DIS] set after DEC reaches zero?

[vijaykishore · Accepted solution]

Hey Scott,

Thanks for the reply.

Yes, the MSR[EE] is set. And the contents of TCR are enabling DIE and ARE.

The issue got resolved. The problem was with loading the IVPR and IVOR10 values only.

Once when I loaded the correct value, it started working.

Thank you.

[marius_grigoras]

Hi,

I tried in CW the decrementer interrupt for P4080DS and it works as expected (please see attached my modified main.c file, maybe this can help you to set your regs correctly). Also please note that kept the default values for IVPR and IVOR settings from tcl initialization file:

	reg ${SPR_GROUP}IVPR = 0x00000000

	# IVOR10 - decrementer
	reg ${SPR_GROUP}IVOR10 = 0x00000900

Regards,

Marius

[vijaykishore]

Hi Marius,
Thanks for the reply.

The
first point you have to note is, I am not using Code Warrior. I just have U-Boot on the target with the PPC tool chain on Linux host, with which I am cross-compiling my application. (This may be useful to you for helping me).

The values which are returned for IVOR10 and IVPR are: 0x00000A00 and 0x00000000. This says that the Interrupt Vector offset for Decrementer is: 0x00000A00 (if I am correct). So, once the decrementer rolls down, interrupt occurs and the control jumps to the above address. I believe that for decrementer, configuration of all registers  is done correctly.

Now there are two problems:
problem is about mapping the interrupt vector offset to my handler function (say timer_handler), and
problem about register accessing

1.)
I am writing my code as part of standalone applcations in U-Boot and compiling it along with U-Boot. So, for all the functions which are defined in my standalone code, there is an address assigned (I think this is done while compiling). Now I am unable to change the address of handler (i.e., Interrupt Service Routine for Decrementer). Any idea if you can for this issue.

2.)

One more thing is, many register are numbered from 32 to 63 in 8548 reference manual (Circled in the figure below). I am modifying theseregisters using mtspr and mfspr instructions. Do I need to consider them as 64-bit registers? Now I am just treating them as 32-bit registers and accessing/modifying them.

Please help me to resolve these issues which held up my work for long time.

[marius_grigoras]

Hi,

Let me understand...right now you're able to get decrementer interrupts and go to decrementer interrupt handler?

Now, about your questions. Indeed, IVPR | IVOR10 computes the Decrementer interrupt address.

1. I attached a file to see how we're saving in our stationary project from CW the InterruptHandler function address when Decrementer interrupt is triggered. (search in file after IVOR10)

2. It's ok treating them as 32bits based. Please note that BookE defines these registers as 64bits based. There is a note that in the architecture's implementation only 32bits are implemented. According with big endian architecture notation this means 32-63.

Regards,

Marius

[vijaykishore]

Hey Marius,

Thanks for your support.

The issue got resolved. The problem was with loading the IVPR and IVOR10 values only.

Once when I loaded the correct value, it started working.

Thank you.