Connection of flash memory on MPC8548E local bus.

[rainer03]

When connecting flash to the local bus, I see that it's necessary to wire the interface of the flash and local bus in reversed order due to the big-endian mode of MPC8548E. I see in MPC8548E Configurable Development System carrier board, the data bus is connected as Flash_D[0..15] <--> MPC_D[15..0]. But I don't understand why the order of address bus is not reversed. In CDC, it's Flash_A[0..21] <--> MPC_A[0..21] instead of Flash_A[0..21] <--> MPC_A[31..10]. With such wiring, how can the MPC address the flash correctly?

Another question is, how the type of the flash, i.e., top/bottom/uniform sectored, decides the connection of the bus?

Thank you for any response.

[LPP]

LSB address bit of MPC should be connected to LSB bit of the FLASH. This rule must be met regardless of big/little endian convention used to enumerate external signals.

If a memory uses byte addressing, LA31 - LSB bit of MPC8548 should be connected to LSB address bit of the flash. In the case of a device that only supports 16-bit accesses, LA31 is not used and the connection starts from the next address bit LA30.

If you use 16-bit only device, connect LA30->FLASH_A0 and then sequentially.

Note. In the case of 8/16 bit flash, some manufactures mark LSB address bit (byte) as A0 while others as A[-1]. You should connect LA30 to corresponding word selection address bit (A1 or A0 respectively).

Flash data signals should be connected to LBC data bus in reversed order. You can revers bits within byte lanes or within whole 16-bit. Both methods are possible. These connections allow using standard algorithms for programming FLASH memory.

I do recommend connecting LSB-to-LSB and MSB-to-MSB. LAD0 to FLASH_D15,LAD15 to FLASH_D0.

The recommended connection is valid for any type of the flash ( top/bottom/uniform sectored).

[hwrobel]

Hi,

First note that bit numbering on a bus has nothing to do with endianess. Bit numbering is a pure convention, and Power Architecture uses the convention to number the msb 0. For a bus, this is shown as LB_A[0:31] whereas the flash numbering would be shown as CLA[23:0]. Note the order of the numbers. Left most is the msb at all times in the notation.

If you check the CDS Reference Manual, you will see that the local bus addressing goes into an Actel PLD called CADMUS. This PLD determines which addresses are then shown to a peripheral on the CLA bus. This goes well beyond just flash connectivity only. There is no necessity to have such a PLD. It just helps configurability, which is a key point of the CDS.

So make sure you don’t confuse bit numbering and significance, and make sure you don’t confuse the signal names in the CDS schematics. It’s not all on the same signals …

Hope this helps,

Heinz