P1021: GPIO: why CE_PB29 can not be controlled?

[carlpeng]

Hello,

In my design, will use PB29 as an input pin to detect the status of the external device, but I find that even though I pull up the PB29 to almost 3.3v by a pull-up resistor, I still read the pin value as 0x0(read the value through GUTS_CPDAT register), why?

Could you please help to give some comments? Thanks a lot!

Meanwhile, I find some description as below in the P1021RM.pdf:

so,  PB29 can be controlled by the using GUTS_CPDIR2n, GUTS_CPDAT registers, not 

need to configure GUTS_PMUXCR, since from the above description, CE_PB[29 : 30] always functions as QE pins.

Thank you,

Carl

[alexander_yakov]

Yes, your understanding is correct, QE pin PB29 is not shared with any other function, so you do not need to configure it in PMUXCR.

Please check GUTS_CPDIR and GUTS_CPPARB should be set to "10" and "00" respectively.

Have a great day,
Alexander

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