QUICC ENGINE VALlDATION

[chidambaram_km]

Hello All,

I'm currently working on LS1021A - TWR Board. We have Successfully loaded the QUICC Firmware please find the below logs for your reference.

"Firmware 'Microcode version 0.0.1 for LS1021a r1.0' for 1021 V1.0
QE: uploading microcode 'Microcode for LS1021a r1.0' version 0.0.1"

I included the qe_ic driver and UCC Uart driver into the kernel. I got below logs for the successful loading of UCC uart driver.

[ 1.955532] Freescale QUICC Engine UART device driver
[ 1.961056] 2402000.ucc: ttyQE0 at MMIO 0x2402000 (irq = 38, base_baud = 9375000) is a QE
[ 1.969579] ucc_uart 2402000.ucc: UCC1 assigned to /dev/ttyQE0
[ 1.975734] 2402200.ucc: ttyQE1 at MMIO 0x2402200 (irq = 39, base_baud = 9375000) is a QE
[ 1.984191] ucc_uart 2402200.ucc: UCC3 assigned to /dev/ttyQE1

Once i get the console i check the interrupt entry of QUICC driver using the below command "cat /proc/interrupts"

Find the below attachment "interrupts.txt".

Please let me know whether I need to get the interrupt entry in the "/proc/interrupts".  And also I'm running the below commands for transmitting the data through ttyQE0 by using the below command.

echo "hi" > /dev/ttyQE0

Here I want to check whether I got transmitted the interrupt or not. Can you please help me to check it.

For your reference "TWR-LS1021A-kernel-logs.txt" attached below.

Thanks in Advance.

[chidambaram_km]

1. After running the microcom command, we are getting the QUICC interrupt entry in cat /proc/interrupts.

Command: microcom -s 115200 /dev/ttyQE0

log :

~# cat /proc/interrupts
CPU0 CPU1
16: 0 0 GIC 29 Edge arch_timer
17: 956 781 GIC 30 Edge arch_timer
18: 0 0 GIC 27 Edge kvm guest timer
22: 0 0 GIC 25 Edge vgic
25: 0 0 GIC 107 Level SCM_IRQ
26: 6957 0 GIC 126 Level mmc0
29: 0 0 GIC 129 Level 2110000.dspi
30: 87 0 GIC 120 Level 2180000.i2c
31: 0 0 GIC 121 Level 2190000.i2c
32: 292 0 GIC 118 Level serial
40: 0 0 GIC 150 Level 29d0000.ftm0
41: 0 0 GIC 147 Level 2ad0000.watchdog
43: 0 0 GIC 167 Level eDMA
47: 0 0 GIC 205 Level gianfar_ptp
51: 0 0 GIC 125 Level xhci-hcd:usb1
56: 0 0 QEIC 32 Level ucc-uart
57: 9 0 GIC 176 Level eth0_g0_tx
58: 133 0 GIC 177 Level eth0_g0_rx
59: 0 0 GIC 178 Level eth0_g0_er
60: 52 0 GIC 179 Level eth0_g1_tx
61: 0 0 GIC 180 Level eth0_g1_rx
62: 0 0 GIC 181 Level eth0_g1_er
IPI0: 0 0 CPU wakeup interrupts
IPI1: 0 0 Timer broadcast interrupts
IPI2: 1695 1349 Rescheduling interrupts
IPI3: 0 0 Function call interrupts
IPI4: 2 13 Single function call interrupts
IPI5: 0 0 CPU stop interrupts
IPI6: 1 0 IRQ work interrupts
IPI7: 0 0 completion interrupts

2. When I transmit data through microcom, the UCC_uart interrupt is not getting triggered.

3.We suspect that the QUICC interrupt controller is enabled in the GIC (interrupt number - 141). We need the procedure to enable the GIC interrupt (interrupt number - 141).

[yipingwang]

In the dts file, please define the device node similar as the following.

&uqe {

        serial: ucc@2000 {

                device_type = "serial";

                compatible = "ucc_uart";

                port-number = <0>;

                rx-clock-name = "brg1";

                tx-clock-name = "brg1";

        };

If your problem persists, in Linux Kernel driver file drivers/tty/serial/ucc_uart.c, please enable LOOPBACK mode, then check whether you could read and write the same value.

[chidambaram_km]

I enabled the below loopback macro in the ucc_uart.c file

* Enable this macro to configure all serial ports in internal loopback
mode */
#define LOOPBACK

And I ran microcom application on the board. And enabled some of the prints in the ucc_uart.c file during the transmit.
Whatever I am pressing the key in the microcom application, I am able to get the same ascii key in the driver. I did not get any interrupt for the TX and I did not receive any RX data.

Please find the below log
~# microcom -s 115200 /dev/ttyQE0
Loopback requires the preamble bit to be set on the first TX BD
1. Enabled Loopback
random: nonblocking pool is initialized
Entering into the qe_uart_start_tx()
Entering into the qe_uart_tx_pump()
Tx data = 1
Tx Len = 1
Setting BD_SC_READY in BD status
Entering into the qe_uart_start_tx()
Entering into the qe_uart_tx_pump()
Tx data = w
Tx Len = 1
Setting BD_SC_READY in BD status
Entering into the qe_uart_start_tx()
Entering into the qe_uart_tx_pump()
Tx data = e
Tx Len = 1
Setting BD_SC_READY in BD status
Entering into the qe_uart_start_tx()
Entering into the qe_uart_tx_pump()
Tx data = r
Tx Len = 1
Setting BD_SC_READY in BD status

Look forword to receving your suggestion.

[chidambaram_km]

Waiting for the response.