I2C architecture clarification

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I2C architecture clarification

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SANTHOSH_2902
Contributor I

Hi,
I am attaching a block diagram of I2C communication for various peripherals like motors, Valves, sensors from a SOM. The existing I2C communication protocol cannot be changed since all designs are freezed already. I'm not sure whether I2C works well in this complex architecture using multiple bus extenders, buffers and I2C muxes.

Please can anyone suggest for any changes in the buffers or re-drivers need to be added further in this architecture or any other serial protocol converter suggestions are welcome.

Also, the entire length of the I2C bus is approximately more than 3 meters, starting from the source to the end peripheral. I need to know whether the I2C bus communication length is in acceptable range or not. If it's in acceptable range, what are the problems it will cause during data transfer and how can I overcome the problems. Kindly suggest me with some ideas to resolve the issue. Thank you.

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diazmarin09
NXP TechSupport
NXP TechSupport

Hello SANTHOSH_2902,

I hope all is great with you. Thank you for using the NXP communities.

Your design seems correct to me. I mean, in theory, the design might work as expected. But, in practice, there are a lot of factors that might affect the functionality.

In this case, I just want to add some comments:

- It would be helpful if you add the NXP device part numbers.

- Is your 8-channel multiplexer compatible with 5V supply? Are you supplying the rest of the device with 5V as well?

diazmarin09_0-1716401742578.png

 

- Same comment with the I2C bus extender (U44), it is compatible with 5V?  

- What is the supply voltage of the PCBA_2?

 

I am asking about the supply voltage to keep in mind that VIL, VOL, VIH and VOH are met for proper communication.

It is always recommended to move away the I2C bus from an EMI/EMC source such as motors.

I hope this information helps.

Regards,

David

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