PN5190 ULPCD calibration inconsistency

[abacus]

Hi.

I'm having some troubles with ULPCD. When the device is awake, card readings are ok. But when I go to ULPCD, sometimes it is unable to detect cards. Other times, it keeps "detecting" (false detections) until I force a new calibration.

I changed the code based on NfcrdlibEx6_LPCD so that it just calibrates ULPCD every 3 seconds. I added some traces for the relevant EEPROM config. Here's the output:

ULPCD_VDDPA_CTRL: 0x00
ULPCD_TIMING_CTRL: 0x3D
ULPCD_VOLTAGE_CTRL: 0x6A
ULPCD_RSSI_GUARD_TIME: 0x0010
ULPCD_RSSI_SAMPLE_CFG: 0x00
ULPCD_THRESH_LVL: 0x0C
DCDC_PWR_CONFIG: 0x21
TXLDO_VDDPA_HIGH: 0x00
TXLDO_VDDPA_LOW: 0x00
HFATT: 0x35
LPCD_REF_VAL: 1447
ULPCD Calibration Successful.

ULPCD_VDDPA_CTRL: 0x00
ULPCD_TIMING_CTRL: 0x3D
ULPCD_VOLTAGE_CTRL: 0x6A
ULPCD_RSSI_GUARD_TIME: 0x0010
ULPCD_RSSI_SAMPLE_CFG: 0x00
ULPCD_THRESH_LVL: 0x0C
DCDC_PWR_CONFIG: 0x21
TXLDO_VDDPA_HIGH: 0x00
TXLDO_VDDPA_LOW: 0x00
HFATT: 0x2C
LPCD_REF_VAL: 1918
ULPCD Calibration Successful.

ULPCD_VDDPA_CTRL: 0x00
ULPCD_TIMING_CTRL: 0x3D
ULPCD_VOLTAGE_CTRL: 0x6A
ULPCD_RSSI_GUARD_TIME: 0x0010
ULPCD_RSSI_SAMPLE_CFG: 0x00
ULPCD_THRESH_LVL: 0x0C
DCDC_PWR_CONFIG: 0x21
TXLDO_VDDPA_HIGH: 0x00
TXLDO_VDDPA_LOW: 0x00
HFATT: 0x35
LPCD_REF_VAL: 1447

ULPCD_VDDPA_CTRL: 0x00
ULPCD_TIMING_CTRL: 0x3D
ULPCD_VOLTAGE_CTRL: 0x6A
ULPCD_RSSI_GUARD_TIME: 0x0010
ULPCD_RSSI_SAMPLE_CFG: 0x00
ULPCD_THRESH_LVL: 0x0C
DCDC_PWR_CONFIG: 0x21
TXLDO_VDDPA_HIGH: 0x00
TXLDO_VDDPA_LOW: 0x00
HFATT: 0x2C
LPCD_REF_VAL: 1918
ULPCD Calibration Successful.

ULPCD_VDDPA_CTRL: 0x00
ULPCD_TIMING_CTRL: 0x3D
ULPCD_VOLTAGE_CTRL: 0x6A
ULPCD_RSSI_GUARD_TIME: 0x0010
ULPCD_RSSI_SAMPLE_CFG: 0x00
ULPCD_THRESH_LVL: 0x0C
DCDC_PWR_CONFIG: 0x21
TXLDO_VDDPA_HIGH: 0x00
TXLDO_VDDPA_LOW: 0x00
HFATT: 0x35
LPCD_REF_VAL: 1447
ULPCD Calibration Successful.

ULPCD_VDDPA_CTRL: 0x00
ULPCD_TIMING_CTRL: 0x3D
ULPCD_VOLTAGE_CTRL: 0x6A
ULPCD_RSSI_GUARD_TIME: 0x0010
ULPCD_RSSI_SAMPLE_CFG: 0x00
ULPCD_THRESH_LVL: 0x0C
DCDC_PWR_CONFIG: 0x21
TXLDO_VDDPA_HIGH: 0x00
TXLDO_VDDPA_LOW: 0x00
HFATT: 0x2C
LPCD_REF_VAL: 1917
ULPCD Calibration Successful.

It looks like it gets alternating calibration results (HFATT: 0x35 and LPCD_REF_VAL: 1447) vs. (HFATT: 0x2C and LPCD_REF_VAL: 1918).

What can be the cause for that behaviour?
Thanks

[KellyLi]

Hello @abacus 

From your configuration, disable DC-DC, VDDPA = 1.5V, so it's recommended that TXLDO_VDDPA_HIGH = 0x0F (3.0V), and try again.

BR

kelly

[abacus]

Hi @KellyLi. Thank you for your reply.

I think DCDC is already disabled (DCDC_PWR_CONFIG: 0x21).

EDIT: Table 5 from PN5190B2 indicates that DCDC_PWR_CONFIG should be 0x21 when DPC is enabled and 0x01 when DPC is disabled in Config3 (which is my power configuration), but DCDC_PWR_CONFIG register defines bit 5 as RFU (Do not touch, default value 01b). So I wonder what value I should write to this register...

I configured TXLDO_VDDPA_HIGH as you suggested (0x0F), but I'm getting similar results.

What is weird is that calibration result is always alternating, It doesn't matter the delay I add in between.

ULPCD_VDDPA_CTRL: 0x00
ULPCD_TIMING_CTRL: 0x0F
ULPCD_VOLTAGE_CTRL: 0x6A
ULPCD_RSSI_GUARD_TIME: 0x0010
ULPCD_RSSI_SAMPLE_CFG: 0x00
ULPCD_THRESH_LVL: 0x0C
DCDC_PWR_CONFIG: 0x21
TXLDO_VDDPA_HIGH: 0x0F
TXLDO_VDDPA_LOW: 0x00
HFATT: 0x36
LPCD_REF_VAL: 1389
ULPCD Calibration Successful.

ULPCD_VDDPA_CTRL: 0x00
ULPCD_TIMING_CTRL: 0x0F
ULPCD_VOLTAGE_CTRL: 0x6A
ULPCD_RSSI_GUARD_TIME: 0x0010
ULPCD_RSSI_SAMPLE_CFG: 0x00
ULPCD_THRESH_LVL: 0x0C
DCDC_PWR_CONFIG: 0x21
TXLDO_VDDPA_HIGH: 0x0F
TXLDO_VDDPA_LOW: 0x00
HFATT: 0x2C
LPCD_REF_VAL: 1924
ULPCD Calibration Successful.

ULPCD_VDDPA_CTRL: 0x00
ULPCD_TIMING_CTRL: 0x0F
ULPCD_VOLTAGE_CTRL: 0x6A
ULPCD_RSSI_GUARD_TIME: 0x0010
ULPCD_RSSI_SAMPLE_CFG: 0x00
ULPCD_THRESH_LVL: 0x0C
DCDC_PWR_CONFIG: 0x21
TXLDO_VDDPA_HIGH: 0x0F
TXLDO_VDDPA_LOW: 0x00
HFATT: 0x36
LPCD_REF_VAL: 1388
ULPCD Calibration Successful.

ULPCD_VDDPA_CTRL: 0x00
ULPCD_TIMING_CTRL: 0x0F
ULPCD_VOLTAGE_CTRL: 0x6A
ULPCD_RSSI_GUARD_TIME: 0x0010
ULPCD_RSSI_SAMPLE_CFG: 0x00
ULPCD_THRESH_LVL: 0x0C
DCDC_PWR_CONFIG: 0x21
TXLDO_VDDPA_HIGH: 0x0F
TXLDO_VDDPA_LOW: 0x00
HFATT: 0x2C
LPCD_REF_VAL: 1922
ULPCD Calibration Successful.

 So, after analysing NfcrdlibEx6_Rc663_LPCD_Demo.c from NfcrdlibEx6_LPCD example, I have some questions:

In function ULPCD_Get_HFATT_Value():

/* Read DPC Configuration value. */
wStatus = phhalHw_Pn5190_Instr_ReadE2Prom(pHal, PHHAL_HW_PN5190_DPC_CONFIG_ADDR, &bDPC_EEPROM_Val, 0x01U);
CHECK_SUCCESS(wStatus);

if (bDPC_EEPROM_Val != 0x00U)
{
    bReadEEPROM_Val = 0x00U;
    /* Disable DPC to get HFATT value by turning ON the RF Field. */
    wStatus = phhalHw_Pn5190_Instr_WriteE2Prom(pHal, PHHAL_HW_PN5190_DPC_CONFIG_ADDR, &bReadEEPROM_Val, 0x01U);
    CHECK_SUCCESS(wStatus);
}

...
...

if (bDPC_EEPROM_Val != 0x77U)
{
    bReadEEPROM_Val = 0x77U;
    /* Enable DPC. */
    wStatus = phhalHw_Pn5190_Instr_WriteE2Prom(pHal, PHHAL_HW_PN5190_DPC_CONFIG_ADDR, &bReadEEPROM_Val, 0x01U);
    CHECK_SUCCESS(wStatus);
}

If bDPC_EEPROM_Val is 0x77, it won't write the value again after disabling DPC. What should be the correct sequence here? Read current DPC config -> Disable DPC -> perform HFATT -> Write original DPC config again?

Why does it write 0x77 if DPC_CONFIG register's 7:3 bits are RFU?

AN12551 quote:

After the DPC is permanently being disabled via EEPROM setting, using the DPC_CONFIG (address 0076h), it requires a Soft Reset to enable all related settings.

I don't see any soft reset in the code after disabling or enabling DPC.

Kind regards

[KellyLi]

Hello @abacus 

1)  Read current DPC config -> Disable DPC -> perform HFATT -> Write original DPC config again?

Yes.

2) Why does it write 0x77 if DPC_CONFIG register's 7:3 bits are RFU?

In fact, only bit0-2 is written, and other values are default values and do not need to be changed.

3) I don't see any soft reset in the code after disabling or enabling DPC.

This action only needed when the DPC is permanently being disabled. However, Demo example is not such situation.

BR

kelly