MCAN Message RAM configuration

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MCAN Message RAM configuration

750 Views
Noobie
Contributor I

Hello,

I'm using MPC5777C controller.

I've currently configured MCAN-0 as mentioned below:

FFE34000 - Standard filters starting address 96 elements of size 4 Bytes
FFE34180 - Extended filters starting address 6 elements of size 8 Bytes
FFE341B0 - RX FIFO 0 starting address 16 elements of size 64+8 Bytes (max 64 byte data)
FFE34630 - RX FIFO 1 starting address 16 elements of size 64+8 Bytes (max 64 byte data)
FFE34AB0 - RX Buffers starting address 64 elements of size 12+8 Bytes (max 12 byte data)
FFE34FB0 - TX Event FIFO starting address 10 elements of size 8 Bytes
FFE35000 - TX Buffers starting address 10 elements of size 64+8 Bytes (max 64 byte data)


Here I've configured for 96 Standard IDs and 6 Extended IDs.

Currently, I want to increase the Standard IDs to 128 AND Extended IDs to 64 (Maximum allowed limit).
I see that and IDs which is present after 0xFFE34240 RAM location are not being accepted.

1. Are there any limit to use both Standard IDs and Extended IDs to their maximum allowed limit (Both together) ?
2. Will the controller allow acceptance filter ID's beyond 0xFFE34240 RAM location ?

In order to achieve this combination I've reduced the RX FIFO0 size to 6 elements.
Below mentioned is my current RAM allocation, which is not working for the filter IDs after 0xFFE34240 RAM location.

FFE34000 - Standard filters starting address 128 elements of size 4 Bytes
FFE34200 - Extended filters starting address 64 elements of size 8 Bytes
FFE34400 - RX FIFO 0 starting address 8 elements of size 64+8 Bytes (max 64 byte data)
FFE34640 - RX FIFO 1 starting address 16 elements of size 64+8 Bytes (max 64 byte data)
FFE34AC0 - RX Buffers starting address 64 elements of size 12+8 Bytes (max 12 byte data)
FFE34FC0 - TX Event FIFO starting address 10 elements of size 8 Bytes
FFE35010 - TX Buffers starting address 10 elements of size 64+8 Bytes (max 64 byte data)

 

Thanks in advance.

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5 Replies

734 Views
Noobie
Contributor I

Hi Petrs,

Thank you for your response.

In second configuration I've reduced the Rx FIFO_0 size in order to fit the Max number of Standard IDs and Extended IDs.

My recent finding on this is that, total of only 128 words is supported for filter IDs (Including Standard and Extended). Any thing beyond 128 words is not considered for acceptance filtering.

These 128 words I'm able to use in different combinations to configure CAN IDs.

Does the controller limit this? Or does any register set any limit for this?

Regards


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725 Views
PetrS
NXP TechSupport
NXP TechSupport

Hi,

I am not aware there is restriction for filter elements. As per the RM up to 128 standard and 64 extended is available, concurrently.
So you see that if you define 128 standard ID filters (128 words) then no extended ID filter is working anymore?
In your original description you wrote 16 words  (8 elements) from extended ID filters seems to be accepted.

BR, Petr

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719 Views
Noobie
Contributor I

Q: So you see that if you define 128 standard ID filters (128 words) then no extended ID filter is working anymore?

A: Yes, this is what I'm facing.

Q: In your original description you wrote 16 words (8 elements) from extended ID filters seems to be accepted.

A: During this I was not using all the Standard IDs, I was only using 92 standard IDs. Now I've added all the 128 Standard IDs and Extended ID filter is not working.

Is there any restrictions for Filter ID configuration ?
Were you able to test ?

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702 Views
PetrS
NXP TechSupport
NXP TechSupport

Hi,

let me create some code and test it on EVB.

BR, Petr

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736 Views
PetrS
NXP TechSupport
NXP TechSupport

Hi,

the RM states within its chip specific MCAN section that each M_CAN instance can address 1216 words in the Message RAM. However no logic is mentioned for this. From your description it looks filters are the one last checked or similar. Let me check this will design.  
If the 1216 words are maximum then the first config fits in it. But the last one should be fine as well, in total it would be 1208 words.

BR, Petr

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