RT1176m7 I2S and eDMA

[ssma]

I would like to use I2S (SAI) unit together with eDMA to continuous transfer audio samples to a codec.
I am used to code this, on a DSP processor as this, (shortly):

Ex two buffers A and B at size 256 samples (int32).
Set-up a DMA TX-channel with, at start: source A-buffer, destination TX reg in the SPORT (I2S).
Set-up an interrupt, when the DMA channel have finished – and then here swap the source mem adr. buffer A-B-A-B-…etc. i.e. Send A-buffer – while calc on the B-buffer, swap, send B-buffer – while calc on the A-buffer etc.
This works with very little processing overhead needed, only one interrupt.

For RT1176 the SAI does only have a FIFO at 32 x 4byte size, and if I use a half-way SAI interrupt, I would need 16 interrupts to transfer 256 samples.

Question: Can I connect the SAI unit TX-reg to an address in memory at size 256  - together with the eDMA channel as described above?

And another thing: I also need to have a RX transfer, running simultaneously with the Tx, but then I need two eDMA, and RT1176m7 does only have ONE eDMA ..?  although the manual overview says 2x eDMA ??

I have found out, that m7 has DMA0 (base 4007_0000h) and m4 has DMA1 (base 40C1_4000h), but why does the overview then write 2x eDMA ??

I Have looked at the driver fsl_sai_edma.c – but I think that the set-up here all is for single transfer a buffer to SAI – not the streaming way, that I am looking for.

[Pavel_Hernandez]

Hello, my name is Pavel, and I will be supporting your case, I reviewed your information and suggest reviewing the SDK example I think this covered the full requirements.

Best regards
Pavel

[ssma]

Hi Pavel, NXP Community

Thanks for your reply for my question about SAI using DMA.

I am impressed about your quick reply, and the ref to example in MCUXpresso IDE is very fine.

I have looked into the code, which is very fine written, but they don’t quite relate to my problem, with both Rx and Tx running synchrony at he same time.

The examples does only playback some recorded sequence.

There are two problems:

1. RT1117_cm7  does NOT have two DMA channel – only one.
2. The SAI FIFO is only 32 samples deep – and cannot be linked/changed to some memory address.

Right now we use a Interrupt based solution, after very 16 samples

But thanks for reply –
I have not 100% dropped, to find some eDMA solution

[ssma]

HI Paul

Tank you for the tip.

I will look into it. 
OK I found out that DMA0 goes with the m7 part in RT1176
and DMA1 in the m4 part, that explain the overview drawing..

BR
Soren

[Pavel_Hernandez]

Hello, I´m afraid that the examples are available, I suggest reviewing the RT500 and the RT600 the application for that boards are for audio and voice. Maybe the examples were different and helped you.

i.MX RT500 | Crossover MCU with ARM Cortex-M33, DSP and GPU Cores | NXP Semiconductors

i.MX RT600 | Crossover MCU with ARM Cortex-M33 and DSP Core | NXP Semiconductors

Best regards,
Pavel

[ssma]

Hi again Pavel Hernandez

I am back almost a year later !!! – with the same question, and the same problem.
I will try to be more precise.

Can you use the TWO DMA in RT1176 crossover MCU, for simulation streaming audio signal in and out ? The DMA and the Codec  should use a pin_pong (A/B buffer) setup, which is a very normal way programming normal DSP processors.

And now I what only to use the M4 part of RT1176 !

Or
Is DMA0 only available from M4 ?
And DMA1 only available from M7 ?

I have read your ref to RT500 and RT600 but does not find an answer here.

Best regards

SSMA

[ssma]

Hi again Pavel Hernandez

Did someone in NXP got my question?
I will try to be even more precise.

Data sheet for RT1170 says: 2 x eDMA !

Can you use the TWO eDMAs  together with I2S, streaming data (sound) in/out simultaneously,  in ONLY M4?

...or...

are one eDMA in M7 and one eDMA in M4 ?

Best regards

SSMA