LSDK2108 LS1012ARDB MAC to MAC communication

[Hugh512]

Hi, Team

Using SERDES1 Protocol: 13576 (0x3508).

In the above block diagram, SGMII is a MAC to MAC interface without an external PHY, it's a fixed link and speed is 1000. RGMII is connected to external PHY RTL8211F. ls1012ardb.dts is configured as below, network can't work. Could you help to check? kernel log also attached.

BTW, in uboot, external PHY RTL8211F is worked properly.(MAC 2 MAC is disabled in uboot).

&pfe {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;

pfe_mac0: ethernet@0 {
compatible = "fsl,pfe-gemac-port";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x0>; /* GEM_ID */
fsl,gemac-bus-id = <0x0>; /* BUS_ID */
/*fsl,gemac-phy-id = <0x2>; PHY_ID */
fixed-link = <0 1 1000 0 0>;
fsl,mdio-mux-val = <0x0>;
local-mac-address = [ 00 1A 2B 3C 4D 5E ];
phy-mode = "sgmii";
fsl,pfe-gemac-if-name = "eth0";
fsl,pfe-phy-if-flags = <0x0>;
fsl,pfe-gemac-mode = <0x1B00>; /* GEMAC_SW_CONF | GEMAC_SW_FULL_DUPLEX | GEMAC_SW_SPEED_1G */
mdio@0 {
reg = <0x0>; /* enabled/disabled */
};
};

pfe_mac1: ethernet@1 {
compatible = "fsl,pfe-gemac-port";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x1>; /* GEM_ID */
fsl,gemac-bus-id = < 0x1 >;
fsl,gemac-phy-id = < 0x1 >;
fsl,mdio-mux-val = <0x0>;
local-mac-address = [ 00 AA BB CC DD EE ];
phy-mode = "rgmii";
fsl,pfe-gemac-if-name = "eth1";
fsl,pfe-phy-if-flags = <0x0>;
fsl,pfe-gemac-mode = <0x1B00>; /* GEMAC_SW_CONF | GEMAC_SW_FULL_DUPLEX | GEMAC_SW_SPEED_1G */
mdio@0 {
reg = <0x1>; /* enabled/disabled */
};
};
};

[yipingwang · Accepted solution]

Please refer to the following dts configuration.

&pfe {

        status = "okay";

        #address-cells = <1>;

        #size-cells = <0>;

        pfe_mac0: ethernet@0 {

                compatible = "fsl,pfe-gemac-port";

                #address-cells = <1>;

                #size-cells = <0>;

                reg = <0x0>;    /* GEM_ID */

                fsl,mdio-mux-val = <0x0>;

                phy-mode = "internal";

                fixed-link {

                              speed = <1000>;

                              full-duplex;

                           };

        };

[Hugh512]

I saw the PFE clock is HUGH DBG: sys clk = 250000 kHz, but I find the PHY clock is about 25MHz, any suggestion?

/* PFE clock is (platform clock / 2) */

/* save sys_clk value as KHz */

pfe->ctrl.sys_clk = clk_get_rate(pfe_clk) / (2 * 1000);

printk(KERN_ALERT "HUGH DBG: sys clk = %d\n", pfe->ctrl.sys_clk);