What are the hardware design considerations required for Secure Boot in LS1043 Platform?
LS1043 Datasheet mentions the following 2 Items
Item-1
"TA_PROG_SFP must be supplied 1.8 V and the chip must operate in the specified fuse programming temperature range only during secure boot fuse programming. For all other operating conditions, TA_PROG_SFP must be tied to GND"
Item-2
For secure boot fuse programming, use the following steps:
1. After the negation of PORESET_B signal, drive TA_PROG_SFP = 1.8 V after a
required minimum delay as listed in Table 7.
2. After the fuse programming is complete, it is required to return TA_PROG_SFP =
GND before the system is power cycled (PORESET_B assertion) or powered down.
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LS1043ARDB (Reference board) has a J13 Jumper option connected to 1.8V. Operated Manually.
Is this the only requirement in hardware for Secure boot implementation ? Any other requirements in Hardware design to implement Secure BOOT for LS1043?
Hi Bulat,
Thanks for your quick response.
1. Yes, on our boards it is done in a manual way. You can design your own circuit which will switch the power on/off.
2. Limit of 6 times relates to fuse programming. After that you will not be able to change/re-program fuses.
3. No, besides mentioned in 1) above.
Yes, switching of TA_PROG_SFP signal is the only hw design requirement for secure boot fuse programming.
Regards,
Bulat