L3 Cache Flush on LS2088A

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L3 Cache Flush on LS2088A

Contributor I

The LS2088A Reference Manual, under the CCN-504 section, at one point states "The L3 must be flushed before writing this register".  I am specifically looking to flush the platform cache as part of initialization in a bare-metal application.  Is there a method or algorithm that I can follow to know for sure that L3 tags and cached data are initialized with the proper ECC values?

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NXP TechSupport
NXP TechSupport

Whenever you flush a cache, its lines become invalidated, thus the proper ECC bits in line/ tag would be updated whenever cache line get loaded from main storage or written to it. for example when  a read access happens to hit that line, then the ECC bits would then be evaluated and if there was corruption an error will be reported. so for instance you can write to a memory area wide enough to span the cache with zeroes or any pattern for instance and then this should guarantee that the cached area is valid and has updated ECC bits, but if there was let us say a corruption in one of the lines then if this line is not evicted or read, as in the below excerpt from RM, then error will not be reported.


Only the error-detecting component and the target of the error data are responsible for reporting the error. For data errors that continue with a data response, the first detector signals the error. For example:


If data read out of memory:

If data read out of memory in response to a read has a double-bit ECC error, the memory controller sends a data response with the RespErr field set to Data Error (DERR). The HN-F node that receives this transaction and forwards it to the requesting RN, does not log or signal any error.


If an L3 eviction:

If an L3 eviction has a double-bit ECC error, the HN-F/L3 signals the error to the MN.


If an RN-F responding to a snoop has a data ECC error:

If an RN-F responding to a snoop has a data ECC error, the data is forwarded to the HN-F with the RespErr field encoded as required. The RN-F might signal an error, although its responsibility is outside the error signaling mechanism. The HN-F does not signal any error while forwarding the data to the requester and, if required, writing back the data to memory.


The HN-F maintains a counter that is used to count the number of correctable errors encountered. The counter maintains a threshold value to enable an error to be signaled when the number of errors reaches the threshold.

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