How to Change CPU Clock Frequency from 900 MHz to 1.2 GHz

[pmccormick]

Hello!  This question pertains to the LS1024A cpu / LS1024A-RDB reference design board.  I would like to run the cpu at 1.2 GHz frequency instead of the default 900 MHz.  Has anyone out there managed to successfully do this?  What steps were involved?  What microloader / bootloader and/or Linux changes were required?  Thanks in advance for any pointers!

[alexander_yakov]

Yes, it can be changed because on RDB LS1024A parts are all 1.2G parts.

The ways is to re-flash uloader on board with the one customer wants follow our documents.

In our RSR release, there are uloader for all LS1024A parts, or you can get it from ASK/SDK build output like below:

[michael@centos 1024_710]$ ls bin/comcerto2000-glibc/
barebox-comcerto-bareboxc2kmfcnevm        barebox-comcerto-m86296uloaderc2kmfcnevm      barebox-comcerto-nandm86295uloaderc2kmfcnevm
barebox-comcerto-bareboxdiagsc2kmfcnevm   barebox-comcerto-m86297uloaderc2kmfcnevm      barebox-comcerto-nandm86296uloaderc2kmfcnevm
barebox-comcerto-m86201uloaderc2kmfcnevm  barebox-comcerto-m86298uloaderc2kmfcnevm      barebox-comcerto-nandm86297uloaderc2kmfcnevm
barebox-comcerto-m86202uloaderc2kmfcnevm  barebox-comcerto-nandm86201uloaderc2kmfcnevm  barebox-comcerto-nandm86298uloaderc2kmfcnevm
barebox-comcerto-m86203uloaderc2kmfcnevm  barebox-comcerto-nandm86202uloaderc2kmfcnevm  keys
barebox-comcerto-m86204uloaderc2kmfcnevm  barebox-comcerto-nandm86203uloaderc2kmfcnevm  md5sums
barebox-comcerto-m86206uloaderc2kmfcnevm  barebox-comcerto-nandm86204uloaderc2kmfcnevm  openwrt-comcerto2000-hgw-rootfs-jffs2-128k.img
barebox-comcerto-m86207uloaderc2kmfcnevm  barebox-comcerto-nandm86206uloaderc2kmfcnevm  openwrt-comcerto2000-hgw-rootfs-jffs2-256k.img
barebox-comcerto-m86208uloaderc2kmfcnevm  barebox-comcerto-nandm86207uloaderc2kmfcnevm  openwrt-comcerto2000-hgw-rootfs-jffs2-64k.img
barebox-comcerto-m86260uloaderc2kmfcnevm  barebox-comcerto-nandm86208uloaderc2kmfcnevm  openwrt-comcerto2000-hgw-rootfs-ubi_nand.img
barebox-comcerto-m86261uloaderc2kmfcnevm  barebox-comcerto-nandm86260uloaderc2kmfcnevm  openwrt-comcerto2000-hgw-rootfs-ubi_nor.img
barebox-comcerto-m86262uloaderc2kmfcnevm  barebox-comcerto-nandm86261uloaderc2kmfcnevm  openwrt-comcerto2000-hgw-uImage.img
barebox-comcerto-m86291uloaderc2kmfcnevm  barebox-comcerto-nandm86262uloaderc2kmfcnevm  openwrt-comcerto2000-hgw-vmlinux
barebox-comcerto-m86292uloaderc2kmfcnevm  barebox-comcerto-nandm86291uloaderc2kmfcnevm  packages
barebox-comcerto-m86293uloaderc2kmfcnevm  barebox-comcerto-nandm86292uloaderc2kmfcnevm  sha256sums
barebox-comcerto-m86294uloaderc2kmfcnevm  barebox-comcerto-nandm86293uloaderc2kmfcnevm  uboot-comcerto-c2kmfcnevm
barebox-comcerto-m86295uloaderc2kmfcnevm  barebox-comcerto-nandm86294uloaderc2kmfcnevm
[michael@centos 1024_710]$

Here M8626x uloader is 650MHz for parts, M8629x is for 900MHz parts and M8620x is for 1.2G parts.
After reboot, you can verify if you were successed or not by below barebox command:

Hit any key to stop autoboot:  3
usage: update -t <uloader|barebox|bareboxenv|kernel|rootfs> -d <nor|nand|i2c> [-m tftp|xmodem|ddr] [-f imagename|-a address] -c
update tools.

options
 -c     to check the crc32 for the image and flashed one

default mode is tftp
type update -t uloader -d <nor|nand|i2c> [-m tftp|xmodem|ddr] [-f imagename|-a address] to update uloader into flash
type update -t barebox -d <nor|nand|i2c> [-m tftp|xmodem|ddr] [-f imagename|-a address] to update barebox into flash
type update -t kernel -d <nor|nand|i2c> [-m tftp|xmodem|ddr] [-f imagename|-a address] to update kernel into flash
type update -t rootfs -d <nor|nand|i2c> [-m tftp|xmodem|ddr] [-f imagename|-a address] to update rootfs into flash
type update -t bareboxenv -d <nor|nand|i2c> [-m tftp|xmodem|ddr] [-f imagename|-a address] to update bareboxenv into flash
Barebox-C2K >/ socinfo
-----------------------------

barebox 2011.06.0 (Jul 26 2017 - 10:47:48)
PLL0: 1800, PLL1: 1000, PLL2: 1500, PLL3: 1066 MHz
Ref Clock: 48 MHz
ARM Clock: 900 MHz
AXI Clock: 250 MHz
DDR Clock: 533 MHz
IPSEC Clock: 300 MHz
C2K Revision: A1
DDR Width : 32
-----------------------------
Barebox-C2K >/

Have a great day,
Alexander
TIC

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[pmccormick]

Thanks for the reply.  I build a custom version of the microloader so I can't use one of the prebuilt ones you mentioned.  What  I ended up doing was to change CLK_CFG in clkcore.h from CLK_CFG1 to CLK_CFG6.  That seemed to work ok for me.  The "socinfo" command was good to know about.  It looks like that was all I needed to do, no changes required to the bootloader or linux.  Aside from some pmic configuration to provide the proper voltages for the cpu, but that is specific to my custom board.