LPC1111 PIO0_7 Enable Question

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LPC1111 PIO0_7 Enable Question

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by Ulysses on Fri Nov 19 09:10:28 MST 2010
I have a very basic SW problem/issue with a LPC1111 and LPCXpresso[COLOR=#1F497D][FONT=&quot][/FONT][/COLOR]. I’m trying to enable PIO0_7 as an input that triggers only on a falling edge. Reading the user manual it says I need to make sure that bit 7 is 0 for port 0 in registers DIR, IS, IBE, IEV and then make bit 7 of IE 1 to enable the interrupt. No matter what we do the interrupt is always being triggered on both the rising and falling edge.  We hooked up a scope to make sure there is not any noise and everything looked clean (see scope log attached). If I chang IBE to 1 (to request triggering on both rising and falling edge) the same behavior is observed.
  
  Could you please tell me what I’m doing wrong? I was using gpio.c/h as a reference. Also do you have a SW engineering contact that I could speak to directly about any SW issues I might have?
  
  Code:
  [COLOR=black][FONT=&quot]   LPC_GPIO[/FONT][/COLOR][COLOR=black][FONT=&quot][0]->DIR  &= ~(1<<7);[/FONT][/COLOR][FONT=&quot][/FONT]
  [COLOR=black][FONT=&quot]   LPC_GPIO[0]->IS   &= ~(1<<7);[/FONT][/COLOR][FONT=&quot][/FONT]
  [COLOR=black][FONT=&quot]   LPC_GPIO[0]->IBE  &= ~(1<<7);[/FONT][/COLOR][FONT=&quot][/FONT]
  [COLOR=black][FONT=&quot]   LPC_GPIO[0]->IEV  &= ~(1<<7);[/FONT][/COLOR][FONT=&quot][/FONT]
  [COLOR=black][FONT=&quot]   LPC_GPIO[0]->IE   |= (1<<7);[/FONT][/COLOR]
  
  [ATTACH]230[/ATTACH]

Original Attachment has been moved to: 1100851_BugAs1.zip

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by curtvm on Fri Nov 19 12:39:11 MST 2010
You may want to also show what you do for the IOCON register and IRQ flag clearing.

I am using the timer capture, and it seems to work better with hysteresis on (I also am setting the the mode to repeater).

Maybe that rising edge is not so clean.
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