When is ENDPTCOMPLETE set?

[rex_lam]

I am new to ARM development, and have been looking into an odd behavior in a legacy product which uses LPC1837. The USB0 ISR processes ENDPTCOMPLETE but sometimes it is not set at the end of a USB transaction (or there was no interrupt), e.g. SetConfiguration. In the ISR, USB0 interrupt is disabled like this:

NVIC_DisableIRQ(USB0_IRQn);

Then before leaving the ISR, it is reenabled:
NVIC_EnableIRQ(USB0_IRQn);

I took USB traces and found no pattern to explain why ENDPTCOMPLETE is sometimes not set. As far as I know, this has only happened during IN transactions. Moving the USB device to a different USB port, or adding an extension USB cable, or adding a hub in between the host and the device could make the problem go away.

Could ENDPTCOMPLETE be affected by the disabling of the IRQ? What is the expected behavior of when ENDPTCOMPLETE is set? Is ENDPTCOMPLETE set for each USB transaction or USB transfer? Any guidance would be greatly appreciated.

Rex

[jeremyzhou]

Hi Rex Lam,
Thank you for your interest in NXP Semiconductor products and for the opportunity to serve you.
1) Could ENDPTCOMPLETE be affected by the disabling of the IRQ?
-- No.
2) What is the expected behavior of when ENDPTCOMPLETE is set?
-- Please refer to the section 23.6.22 USB Endpoint Complete register in the UM10430.

I was wondering if you can share a compile-able demo and introduce the testing procedure, then I can replicate the phenomenon on my site and it can help me figure it out.
Have a great day,
TIC

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[rex_lam]

Jeremy,

Thank you for the reply. I have read 23.6.22 and verified that IOC is set in every transfer descriptor. The problem only occurs on three USB ports on the front of my Dell T5600. According to USBView, these ports are 3 of 8 ports of a generic USB hub connected to the root hub. When connected to other ports (of the same generic USB hub) on the back of the Dell T5600, the problem does not occur. I don't think you will be able to replicate the problem at your site since I haven't found any other PC that could replicate the problem.

The problem has only occurred with IN transfers on endpoint 0. It has not happened on endpoint 1, which is used by the interrupt pipe. It has not occurred with OUT transfers on endpoint 0 either. I think the specific problem is that there is sometimes no USB0 interrupt for endpoint 0 transfer completion, when connected to front ports of my T5600. The host appears to be satisfied with all USB messages, and there are no visible errors in USB traces captured with Ellisys USB Explorer 200. The device firmware was written in-house, and does not leverage CMSIS.

Could a faulty hub port cause this problem on endpoint 0?

Rex

[jeremyzhou]

Hi Rex Lam,
Thanks for your reply.
I don't experience with this kind of phenomenon, however, I suspect that this issue is related to the USB port in your Dell T5600.
Whether you can replicate the phenomenon in another Dell T5600.
Have a great day,
TIC

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