Wait for DMA Controller enable

[lpcware]

Content originally posted in LPCWare by ezharkov on Fri Aug 23 09:58:33 MST 2013
There are the following lines in lpc177x_8x_gpdma.c:

LPC_GPDMA->Config = GPDMA_DMACConfig_E;
while (!(LPC_GPDMA->Config & GPDMA_DMACConfig_E));

My question is what is the loop for? I cannot find anything in the UM10470 datasheet that calls for a loop.

[lpcware]

Content originally posted in LPCWare by Rob65 on Wed Sep 04 03:20:58 MST 2013
As far as I can see the hardware does not control the DMACConfig_E bit. This is just something you write to from software to enable or disable the full DMA controller.

Why would this bit not be a 1 after writing it as a one just before the loop - unless there is some unexplained magic. I have not done this before in my own DMA code and never missed it.

Rob

[lpcware]

Content originally posted in LPCWare by Pacman on Tue Aug 27 13:35:36 MST 2013
Nothing in the LPC176x's UM10360 either. I'm interested in this too.

However, if looking at the DMA channels, it indicates that you can wait until a DMA channel is disabled.
Perhaps it was born out from someone looking at that ?
Anyway, since the DMACConfig register can be both read and written, I don't think it would hurt to wait for it to be enabled (well, unless you're running out of space or CPU-time).

NXP Expert comments welcome. ;)