USART interrupt on LPC55S69 Board

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USART interrupt on LPC55S69 Board

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mat1024
Contributor III

Hi,

I am trying to use USART interrupt to get more than 32 bytes message at once, but I am not 100% sure how to do that.

It would be greatly appreciated if anyone could help me to figure out why my code is not working well.

Here is a code snippet.

uint8_t req_msg[BUF_SIZE] = {0, };
size_t req_msg_len = 0;

void DEMO_USART_IRQHandler(void)
{
    uint8_t msg[BUF_SIZE] = {0, };
    size_t msg_len = 0;

    /* If new data arrived. */
    while ((kUSART_RxFifoNotEmptyFlag) & USART_GetStatusFlags(DEMO_USART))
    {
        req_msg[req_msg_len++] = USART_ReadByte(DEMO_USART);
        if (req_msg_len >= BUF_SIZE)
        {
            // error handling
        }
    }

    do_task();
    req_msg_len = 0;

    // __NVIC_ClearPendingIRQ(DEMO_USART_IRQn);
    // USART_ClearStatusFlags(DEMO_USART, kUSART_RxError);

    SDK_ISR_EXIT_BARRIER;
}

 

I want to do a small task within USART ISR, but when I sends more than 16 bytes through USART, it only receives 16 bytes (others are ignored).

Also, sometimes it receives a single USART message (larger than 16 bytes) separately, so USART ISR is triggered twice (first receives 1 byte and second receives next 16 bytes).

That's why I attempted to use __NVIC_ClearPendingIRQ() and USART_ClearStatusFlags() functions (I want to clear the pended interrupt just in case).

Any suggestions or ideas?

FYI, this code is executed in secure world, so I can't use RTOS on it.

Thank you in advance for your support!!!

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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,

I suppose that you can use the following code to read the uart receiver data.

you can set up the receiver watermark level:

//set up the receiver FIFO watermark, 10 chars will trigger interrupt


UART0->FIFOTRIG=1<<1|10<<16;

uint8_t msg[BUF_SIZE] = {};
size_t msg_len = 0;

void DEMO_USART_IRQHandler(void)
{

/* If new data arrived. */
while ((0x1F<<16) & UART0->FIFOSTAT)) //USART_GetStatusFlags(DEMO_USART))
{
req_msg[req_msg_len++] = USART_ReadByte(DEMO_USART);
}

do_task();
req_msg_len = 0;

// __NVIC_ClearPendingIRQ(DEMO_USART_IRQn);
// USART_ClearStatusFlags(DEMO_USART, kUSART_RxError);

SDK_ISR_EXIT_BARRIER;
}

 

You can not use the __NVIC_ClearPendingIRQ(DEMO_USART_IRQn); executing the instruction will clear the interrupt.

Hope it can help you

BR

XiangJun Rong

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mat1024
Contributor III

Hi Xiangjun,

Thank you for your response! I want to make sure if I understood correctly.

  1. Was the FIFO watermark initially 1, so the ISR got the first interrupt only with a single character? Then, why was there a second interrupt with up to 16 characters?
  2. If I set up the receiver FIFO watermark 10, can it handle more than 32 bytes when a single ISR is triggered?
  3. The reason why I used __NVIC_ClearPendingIRQ was to clear pending USART interrupt during ISR. Is it not intended to be used in the same ISR?

Thanks again!

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mat1024
Contributor III

Hi Xiangjun,

I tried to set FIFO rx watermark as 10, but the problem was still there. It received 10 bytes from the first ISR and received the next 16 bytes from the second ISR. Only the first part was changed from getting 1 byte to 10 bytes, but it still couldn't handle the whole bytes.

Would you let me know what would be the intended way to handle larger bytes from ISRs?

Thank you!

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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,

The FIFOSTAT[RXLVL] indicates how many bytes in the receiver FIFO, so you can read the value FIFOSTAT[RXLVL] and know now many bytes you can read in the ISR

Hope it is helpful.

BR

XiangJun Rong

 

xiangjun_rong_0-1713429758664.png

 

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mat1024
Contributor III

Hi Xiangjun,

Then what would be a general way to read UART in ISR?

Reading a single byte and executing a task when the last byte is received?

Or can I read multiple bytes in a single ISR? If so, how many bytes I can handle in a single ISR?

In other words, if the counterpart writes more than 32 bytes at once to UART, how can the NXP board read it in a single ISR?

The code I shared above attempted to read it in a single ISR, but it behaved way differently from my expectations.

Could you help me why it happened (ISR triggered twice upon a single write from the counterpart, the first one read the first byte and the second one read the next 16 bytes)?

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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,

As I said in the previous remarks, you can read the FIFOSTAT[RXLVL] bits to know how many chars in the receiver FIFO, then read all of them in the ISR.

Hope it can help you

BR

XiangJun Rong

xiangjun_rong_0-1713757247045.png

 

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mat1024
Contributor III

Hi XiangJun,

I might be wrong, but I still do not fully understand why the interrupt has been triggered multiple times, though the counterpart wrote more than 32 bytes once. Can the RX interrupt be triggered multiple times from a single write?

Also, even though I sent 32 bytes, ISR could receive 1 byte and 8 bytes, and other 23 bytes were lost. Do you have any ideas why this happened?

Thanks!!

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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,

As you know that you can not write 32bytes to transmitter FIFO once, because the FIFO size of the transmitter FIFO is 16 char entries, in other words, you can only write at most 16 char to the transmitter once.

This is general code, you can poll the FIFO[TXEMPTY], when it is set, you can write a char

Hope it can help you

BR

XiangJun Rong

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