Large performance loss when booting from SPIFI

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Large performance loss when booting from SPIFI

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CaptainTeemo
Contributor III

I tried to migrate my project from LPC4337 to LPC4320. Since LPC4320 has no internal Flash, I mounted a piece of MX25L8035E on the SPIFI interface and set it to boot from SPIFI.
When this project runs on LPC4337, the CPU usage rate is only 20%, but when it runs on LPC4320, the CPU usage rate reaches 100%, and the task execution frequency does not reach the predetermined value.
I try to change the CTRL register SPIFI_CTRL_CSHI in SPIFI to 0, and the program execution speed is accelerated, but the task execution frequency is still lower than the predetermined value, and the CPU usage is still 100%.
For this kind of microcontroller with external Flash, is it necessary to make some special settings for SPIFI to improve performance?
The following is my code for configuring SPIFI in SystemInit(). The compiler I use is Keil MDK.


Chip_Clock_SetBaseClock(CLK_BASE_SPIFI, CLKIN_IRC, true, false);
LPC_SPIFI->CTRL = SPIFI_CTRL_TO(0x0)|\
                                   SPIFI_CTRL_CSHI(0x0)|\
                                   SPIFI_CTRL_DATA_PREFETCH_DISABLE(0)|\
                                   SPIFI_CTRL_INTEN(0)|\
                                   SPIFI_CTRL_MODE3(0)|\
                                   SPIFI_CTRL_PREFETCH_DISABLE(0)|\
                                   SPIFI_CTRL_DUAL(0)|\
                                   SPIFI_CTRL_RFCLK(1)|\
                                   SPIFI_CTRL_FBCLK(1)|\
                                   SPIFI_CTRL_DMAEN(0);

Chip_SetupCoreClock(CLKIN_CRYSTAL, 204000000, true);

Chip_Clock_SetDivider(CLK_IDIV_E, CLKIN_MAINPLL, 2);
Chip_Clock_SetBaseClock(CLK_BASE_SPIFI, CLKIN_IDIVE, true, false);

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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,

I have checked that the BASE_SPIFI_CLK clock frequency can reach up to 204MHz, the same as the frequency of BASE_M4_CLK.

You configure the  BASE_M4_CLK as 204mHz with the line:

Chip_SetupCoreClock(CLKIN_CRYSTAL, 204000000, true);

The BASE_SPIFI_CLK clock is from IDIVE, the IDIVE clock is from CLKIN_MAINPLL() by divider 2. In theory, the BASE_SPIFI_CLK is 102MHz.

I suspect that the BASE_SPIFI_CLK is not 102MHz as you expected.

Pls route the the IDIVE clock to CLKOUT pin and test the clock frequency exactly with oscilloscope.

BR

XiangJun Rong

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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,

I have checked that the BASE_SPIFI_CLK clock frequency can reach up to 204MHz, the same as the frequency of BASE_M4_CLK.

You configure the  BASE_M4_CLK as 204mHz with the line:

Chip_SetupCoreClock(CLKIN_CRYSTAL, 204000000, true);

The BASE_SPIFI_CLK clock is from IDIVE, the IDIVE clock is from CLKIN_MAINPLL() by divider 2. In theory, the BASE_SPIFI_CLK is 102MHz.

I suspect that the BASE_SPIFI_CLK is not 102MHz as you expected.

Pls route the the IDIVE clock to CLKOUT pin and test the clock frequency exactly with oscilloscope.

BR

XiangJun Rong

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CaptainTeemo
Contributor III

感谢你的回复,每次我问问题都是老哥你回答的,麻烦了你这么多次我都不太好意思了。

我用示波器测试过Flash的SCK引脚,频率是102MHz没错,芯片也确实工作在QSPI模式,IO0-3都有信号,我也尝试切换到IDIVA的二分频,也是一样的效果。

在解决问题的过程中我找到了这个https://community.nxp.com/t5/LPC-Microcontrollers/LPC4370-performance-with-external-SPIFI-flash/td-p...

并且和周围的工程师交流了一下,对于这种没有cache的M4内核,从SPIFI启动确实非常非常影响执行效率,就我实测的情况来看,估计执行效率只有内置Flash型号的十分之一左右。其他工程师给我的建议是用SPIFI的话要么把代码加载到内存中执行,要么就接受这慢的要死的速度,但是我的代码有至少500KB都是需要高速执行的,LPC4320的内存似乎也没有这么大可以让我可以加载代码。

我不太确定我是不是漏配置了什么东西导致执行效率这么低,但是参考LPCOpen的代码,确实没有对SPIFI的特殊配置。如果从SPIFI中执行的速度只有内置Flash的十分之一的话,那数据手册UM10503中SPIFI章节的这一句可能需要删掉了【SPI 闪存接口 (SPIFI) 支持低成本串行闪存连接到 Cortex-M4 处理器,相对于引脚数量更多的并行闪存设备而言,性能损失并不大。】【Built-in cache to give high-performance code execution】。 关于英文版中的Built-in cache,这个cache启动了没有,怎么配置,到底有多大,似乎也没有更多的介绍。看上去我也只能接受SPIFI闪存执行效率就是很低的现实了。

感谢你的回复,祝你工作顺利身体健康。

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