LPC54S018 Flash Reset pin

[mh_n]

Hello,

I have noticed from the LPC54S018 schematics (Screenshot below) that for the NOR Flash, the "nRESET" is connected to P2_12. I would like to know how that pin is controlled and set. (I have not been able to find anything referencing it in the pin_mux of software examples or the documentations). 
The reason for this question is that we are using a LPC54S016 which does not have the P2_12 pin. It would be great if someone can let me know how the P2_12 in an LPC54S018-EVK board is being controlled, so we can make this work on the LPC54S016.
 

[RaRo]

Hello @mh_n,

As you can see in the following table from LPC540xx/LPC54S0xx Datasheet:

The PIO2_12 it is working as a GPIO pin. The configuration needed for work with the QSPI NOR Flash as nRESET is made by software. So, you should try using another GPIO pin to use as PIO2_12 for the nRESET signal.

Regards, Raul.

[mh_n]

Hello @RaRo ,

Thank you for your reply,

That makes sense; However, I thought that I should be able to find something regarding PIO2_12 pin in the pin_mux of the software examples since that pin is controlled by the software. But I could not find any.

Am I thinking of this in a wrong way? 

Regards,

Mohammad

[RaRo · Accepted solution]

Hello @mh_n,

Actually, the LPC54S018's examples or pin_mux files are not using the W25Q128JVFIM QSPI (SPIFI) NOR Flash's nRESET pin; that is why you are not finding something useful regarding PIO2_12 pin as nRESET.

Also, you can make a RESET by a software sequence, so you may not need to use the nRESET pin; in the examples the RESET could be set trough two consecutive commands: Enable Reset (66h) & Reset (99h).

A deeper explanation of the nRESET pin and the software sequence is in W25Q128JV_DTR Datasheet: Chapter 6.1.7 Software Reset & Hardware /RESET pin.

Best regards, Raul.