LPC546xx: PWM output on CTx_MAT3

[giusloq]

I'd like to output a PWM signal from CT4_MAT3 pin. I read a small not on User Manual:

Note: It is recommended to use match channel 3 to set the PWM cycle.

Is it recommended or mandatory, and why?

I tried to use MAT3 for PWM output and MAT0 for PWM cycle, like this:

CTIMER_SetupPwm(CTIMER4,
	kCTIMER_Match_0,		// pwmPeriodChannel
	kCTIMER_Match_3,		// matchChannel
        50,
        10000,
        12000000,
        0);

 but at first it didn't work. Then I noticed this instruction in CTIMER_SetupPwm:

reg |= CTIMER_MCR_MR3R_MASK;

that says to reset the timer counter on MR3. After replacing with:

reg |= CTIMER_MCR_MR0R_MASK;

I was able to generate my PWM output from CT4_MAT3.

Is it ok? Why there's such a limitation?

[Alice_Yang · Accepted solution]

Hello,

Yes, you can .

I think this note is come from old parts, because old products,  the match 3 is not routed to output pin,  it 

can not output PWM, so recommend it as PWM cycle.

While MATCH3 pin out with lpc546xx.

BR

Alice

[giusloq]

Yes, you can .

Ok, but NXP should fix the user manual (removing the note) and fix the SDK code, that is much more important.