// XXXXXXXXXX FLASH XXXXXXXXXXX
#if (A0_ENABLE)
PINSEL8 = 0x55555555; // A0-A15
#else
PINSEL8 = 0x55555554; // A1-A15
// tie A0 low
FIO4DIR |= 1;
FIO4CLR |= 1;
#endif
#if (A0_ENABLE)
EMCSTATICCNFG1 = (
(1 << CNF_MEM_WIDTH) | // bus width 0==8, 1==16, 2==32
(0 << CNF_PAGE_MODE) | // enable page mode (len=4)
(0 << CNF_CS_HIGH) | // CS polarity 0=low, 1==high
(0 << CNF_BLS_READ) | // byte lane active for 0=wr, 1=rd/wr
(0 << CNF_EXT_WAIT) | // enable extended wait
(0 << CNF_BUFF_EN) | // buffer enable
(0 << CNF_WR_PROT) | // enable write protect
0);
#else
EMCSTATICCNFG1 = (
(1 << CNF_MEM_WIDTH) | // bus width 0==8, 1==16, 2==32
(0 << CNF_PAGE_MODE) | // enable page mode (len=4)
(0 << CNF_CS_HIGH) | // CS polarity 0=low, 1==high
(1 << CNF_BLS_READ) | // byte lane active for 0=wr, 1=rd/wr
(0 << CNF_EXT_WAIT) | // enable extended wait
(0 << CNF_BUFF_EN) | // buffer enable
(0 << CNF_WR_PROT) | // enable write protect
0);
#endif
EMCSTATICWAITOEN1 = 1; // 15 max CS->OE delay: N*17.361ns
EMCSTATICWAITRD1 = 6; // 31 max CS length: (N+1)*17.361ns
EMCSTATICWAITTURN1= 5; // 15 max bus turn around after read: (N+1)*17.361ns
//EMCSTATICWAITPG1 = 0;
EMCSTATICWAITWEN1 = 0; // 15 max CS->WE delay: (N+1)*17.361ns
EMCSTATICWAITWR1 = 5; // 31 max WE length: (N+2)*17.361ns
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