LPC11U68 Deep Power-Down Fails if Wake Pin Low

[brulath]

If the wake pin on the LPC11U68 is low when entering deep power-down (DPD) mode, the processor appears to stop functioning; the debug session ends (if present), the processor does not enter DPD mode, the processor does not reset, none of the fault handlers appear to be called, and the watch dog timer cannot recover it. The only way we've found to recover it is to use the reset line (which would not work if it was in DPD) or power-cycle it.

A flaw on some of the boards I'm working on at the moment means a transient low pulse on the wake pin is possible while the MCU enters DPD mode, if an external stimulus occurs. This flaw will be guarded against in the future, however in the mean time I'm interested in a work-around.

Has anyone experienced and resolved this issue? It seems like it's a hardware flaw, but I'm open to software solutions if they exist. The design does require the use of the wake pin to be useful. Waiting for the pin to go high prior to entering DPD mode doesn't appear to be sufficient.

Thanks in advance :smileyhappy:

- B

[jeremyzhou]

Hi Bruce Andrews,
Thank you for your interest in NXP Semiconductor products and
for the opportunity to serve you.
I will test it by myself and respond to you later.
Have a great day,
TIC

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[brulath]

Hey Jeremy,

I believe I've found a software work-around. If the SysTick is enabled or USART2 is configured and the wake line is low when entering deep power-down the processor freezes. Disabling the SysTick and resetting & disabling (just disabling isn't enough) the USART2 peripheral prior to deep power-down seems to have resolved this.

- B