Content originally posted in LPCWare by mark03 on Mon Oct 22 17:54:28 MST 2012
I'm interfacing a serial A/D (LTC237x series) to an LPC4357, and trying to decide the optimal solution for having the data transfer "in the background" as much as possible. Ideally I would like the data to fill a DMA buffer in RAM without spending any CPU cycles until the buffer needs emptying.
I will drive the A/D conversion clock with a GPIO timer/counter output. The A/D indicates it is done by the falling edge of a BUSY signal, and requires the host to provide SCLK and read the bits back. Based on my reading of the LPC user's guide, if I use SSP the only way I can perform a read is to write dummy words. The SSP has a nice FIFO, which would probably suffice in place of a DMA buffer, IF I could have that FIFO filling autonomously, but it's not clear to me that this is possible. I can't just load up the transmit FIFO, then sit back and wait, because the SSP must only transmit/receive a frame when an A/D sample is ready. I don't see any way to achieve this without CPU involvement (interrupt based).
Not really liking that prospect, I was looking at SGPIO. There's no sample FIFO there (only the bit FIFOs for deserialization), so I would want to use DMA. The user's guide says this is possible, but has anyone actually tried it [successfully]? I'd feel a lot better with a working example to look at.
Any other suggestions?
Thanks,
Mark