GPIO Set Config

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GPIO Set Config

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derekcook
Senior Contributor I

Hello, 

I am having a hard time finding specific information in the documents and datasheets for the KV3 and KMS as to what each of the GPIO configuration options do: 

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For instance, how strong is the PU or PD?

What is the difference in low and high drive strength?

What is the passive filter? 

What does the Open Drain do? 

When should each of these be used? 

Thanks, 

Derek

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derekcook
Senior Contributor I

Thanks for the explanation Philip and directing me in the proper location for where to find this info. 

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philip_drake
NXP Employee
NXP Employee

The General Purpose I/O questions you ask are answered in the data sheet for the MCU.

the pull up spec is there: For these specs see Table 3

Table 3. Voltage and current operating behaviors

RPU Internal pullup resistors 20 — 50 kΩ 3

RPD Internal pulldown resistors 20 — 50 kΩ 4

Low Drive is up to 5 ma and High Drive is up to 20 ma

in note 1 of the same table it list the ports with this option: Not all pins are capable of high drive

1. PTB0, PTB1, PTC3, PTC4, PTD4, PTD5, PTD6, and PTD7 I/O have both high drive and normal drive capability

selected by the associated PTx_PCRn[DSE] control bit. All other GPIOs are normal drive only.

In the Reference Manual there is a port PCR register define for each pin and pin mux table with a description of how the functionality of the pins can change with a selection of the pin mux.  This configuration is all handled by the pins config tool in MCUXpresso.  Let that tool be your guide in how to set each pin.  Here is and overview

The function of Open Drain is just microcontroller terminology that refers to the type of transistors in the pin output drive.  These pins can sink current by driving low but cannot source current while driving high. here

A passive filer is a simple RC circuit in the pad, limiting the pulse minimum that will be recognized as an edge.  The passive filter usually will allow pulse of 50 ns or larger to be counted as an edge. The Data sheet covers this in Table 10.

The when should each be used is supposedly common hardware design engineering, but with this kind of High speed designs there are a number of guides you can follow. PCB design, this topic is probably more engineering training than I can do on the community.

Regards,

Philip Drake