__NVIC_SystemReset not working on MK82

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__NVIC_SystemReset not working on MK82

790 次查看
zahidul3
Contributor III

Hi,

The __NVIC_SystemReset was once working, then after some development (XiP on external flash) it stopped working. Is there any prerequisites for the system reset or does anyone know how to debug why the reset seems to freeze the chip? It does seem to come back alive when I power off and on.

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597 次查看
deniscollis
Contributor V

I think we have found the issue. It has to do with the K81 or K82 NMI pin, which is connected to the IRQ pin of a PN5180 or PN5190 NFC frontend. This interferes with the flash configuration block, as set in startup_mk81f25615 or startup_mk82f25615.  The default created from the SDK has the following:

 

 

//*****************************************************************************
// Flash Configuration block : 16-byte flash configuration field that stores
// default protection settings (loaded on reset) and security information that
// allows the MCU to restrict access to the Flash Memory module.
// Placed at address 0x400 by the linker script.
//*****************************************************************************
__attribute__ ((used,section(".FlashConfig"))) const struct {
    unsigned int word1;
    unsigned int word2;
    unsigned int word3;
    unsigned int word4;
} Flash_Config = {0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFF3DFE};

 

 

In this case:

  • NMI_DIS bit is set, (NMI pin/interrupts reset default to 'enabled')
  • BOOTPIN_OPT is not set (which forces Boot from ROM is BOOTCFG0 is asserted - requires RESET pin enabled)

Changing to:

  • NMI is not set (NMI Interrupts are always blocked)
  • BOOTPIN_OPT is set (requires BOOTSRC_SEL to be set)
  • BOOTSRC_SEL is 00b (Boot from Internal Flash)

 

 

} Flash_Config = {0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFF3BFE};

 

 

__NVIC_SystemReset() is now working.

 

(BTW, the reason why it worked after cycling power is because the FOPT register reverts to its unset state, 0xFFFFFFFF, after POR)

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686 次查看
zahidul3
Contributor III

Hi Miguel,

The reset sources before issuing the software reset is 0x82 from output of RCM_GetPreviousResetSources() API.

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689 次查看
deniscollis
Contributor V

Hi all,

I'm having the same issue, but with a different board and different firmware.

(I think this is related to this issue)

RCM After Normal Power-Cycle
SRS0 0x0
SRS1 0x4
SSRS0 0x82
SSRS1 0x4

RCM after Successful __NVIC_SystemReset()
SRS0 0x0
SRS1 0x4
SSRS0 0x2
SSRS1 0x4

If __NVIC_SystemReset() Fails, then debugger loses control, so you have to cycle power and restart MCUXpresso before you can attempt to read the RCM, therefore  

RCM on first power-up after Failed __NVIC_SystemReset() (and system freeze):
Either...
SRS0 0x2
SRS1 0x0
SSRS0 0x2
SSRS1 0x0
Or..
SRS0 0x82
SRS1 0x0
SSRS0 0x82
SSRS1 0x0
(If a UART is connected to the PC, then the power cycle fails, but succeeds on a second power-cycle after disconnecting the UART, hence 2 RCM SRS possibilities)

 

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Miguel04
NXP TechSupport
NXP TechSupport

Hi @zahidul3 

I'm investigating your issue and I think there must be a reset status flag that is not being cleared, can you share with me the value of RCM_SRS0 and RCM_SRS1?

These registers include read only status flags to indicate the source of the reset, you can find this on the reference manual chapter 16.2 Reset memory map and register descriptions.

Best Regards, Miguel.

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