LLS - run transition event lost

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LLS - run transition event lost

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martindusek
Contributor V

A falling edge on some PIN and LPTMR is set to generate interrupts in run mode and both are also enabled to wake up MCU from LLS low power mode.

LPTMR timeout period is 1 ms, PIN falling edge occurs randomly.

Is it guaranteed that no event (LPTMR timeout, falling edge on pin) will be lost, especially during transitions between run and LLS (or vice versa)?

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Paul_Tian
NXP Employee
NXP Employee

Hi, Martin

In your application, you would like to set GPIO and LPTMR as two LLWU to wake up MCU from LLS mode. Yes, as you concerned, there will be a missing risk in your operation. As you know, NVIC is disable in LLS mode, so one of these two LLWU will really wake up and other interrupt will lost.

I would like to give you a suggestion. I think your concern is pin falling edge is missed. I think you need to check the pin level when MCU wakeup from LLS.

Our LLS wake up timing about 5us. So I think the low level of pin will keep after MCU wake up from LLS.

If your pin pluse is shorter than 5us, sorry, it really has missing risk.

Hope my reply can help you.

Best Regards

Paul

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martindusek
Contributor V

Dear Paul,

thanks for your reply. I understand it that LPTMR timeout can also be lost from what you write. However, LPTMR is operational in both modes so I think LPTMR timeout interrupt can't be lost. Am I right?

Best regards

Martin

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Paul_Tian
NXP Employee
NXP Employee

Hi, Martin

Sorry, my reply make you confused. LPTMR interrupt flag will be set, when MCU enter run mode then NVIC will handle this flag. So LPTMR interrupt will not be lost.  Let me give you an example(with KL25).

As you know, NVIC only has interrupt PORTA and PORTD, and LLWU only support PTD4 and PTD6. So if you use these two pins and LPTMR to wakeup MCU, the interrupt will not be lost. Because interrupt flag always be set when interrupt happen. Buit in LLS mode, NVIC is disable and no handling. When MCU wakeup from LLS mode, NVIC will handle interrupt flag according to interrupt priority level.

Hope my reply can help you.

Best Regards

Paul

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martindusek
Contributor V

Sorry, I'm still quite uncertain whether I understand it correctly.

OK, so LPTMR interrupt can't be lost during transition from run to LLS or LLS to run.

This will be my setup: I will enable interrupt on PTD4 (PORTD_IRQ) and will also enable MCU wake up by PTD4 (LLWU_IRQ). So the interrupt event on PTD4 will be handled by either PORTD_IRQ ISR or LLWU_IRQ ISR depenging on mode of MCU (run or LLS). LPTMR is also enabled to wake up MCU. Should I expect any lost interrupts on PTD4?

What about this situation:

MCU in LLS mode, LPTMR timeouts and MCU starts to wake up. Instantly after LPTMR timeout, falling edge on PTD4 happens. What ISR will service it - none, PORTD_IRQ ISR, LLWU_IRQ ISR or both?

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Paul_Tian
NXP Employee
NXP Employee

Hi, Martin

You can receive PORTD_IRQ ISR, and LLWU_IRQ ISR is cancelled.

No matter how many LLWU interrupt resources, from LLWU side, there is only one interrupt will wakeup MCU. These interrupt resources are "AND" relationship. So please do not do anything in anyone LLWU ISR. If you do function operation in LLWU ISR, this function might be missed. If you add your function in ISR_NVIC, it will not be missed.

Hope my reply is clear this time and helpful for you.

Best Regards

Paul

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martindusek
Contributor V

This paragraph from PORT chapter explained me everything I needed:

During stop mode, the interrupt status flag for any enabled interrupt (but not DMA request) will asynchronously set if the required level or edge is detected. This also generates an asynchronous wakeup signal to exit the low power mode.

For my application it means that no interrupt will be lost as interrupt flag in PORT module and interrupt flag in LPTMR module are set even in stop modes.

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Paul_Tian
NXP Employee
NXP Employee

Hi, Martin

Yes, it is confirm that the interrupt will not be lost as mentioned in my reply. This content you list explain this issue. It is glad that your issue is solved.

Best Regards

Paul

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erikmalund
Contributor I

You do not say which chip, but I believe I am right when I have a problem with the expression These interrupt resources are "AND" relationship, which, in most cases, should be  These interrupt resources are "negative OR" relationship, Yes, I know these are "the same", but it is very easy to get confused when the wrong name is used.

Erik

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