KV58: DWT Delay Problem (DWT延时卡死)

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KV58: DWT Delay Problem (DWT延时卡死)

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1,636 Views
shenjiaqihi
Contributor I

IC:MKV58F1M0VLQ24

IAR 8.22

I use DWT to some accurate delays. It works well in debug mode, but it stuck when I restart its power supply.

How to solve?

我用DWT实现一些精准的延时,在IAR的调试模式中是能正常工作的,但是当给单片机重新上电后,程序卡死在执行DWT延时时。请问如何解决?

Here are the codes:


#define DEMCR ( *(unsigned int *)0xE000EDFC )
#define TRCENA ( 0x01 << 24) 
#define DWT_CTRL ( *(unsigned int *)0xE0001000 )
#define CYCCNTENA ( 0x01 << 0 ) 
#define DWT_CYCCNT ( *(unsigned int *)0xE0001004) 


void dwt_init(int sys_clk)
{
   DEMCR |= TRCENA;
   DWT_CTRL |= CYCCNTENA;
}

void dwt_delay_us(uint32 uSec)
{
   int ticks_start, ticks_end, ticks_delay;
   dwt_init(MCU_SYSCLK);
   ticks_start = DWT_CYCCNT;
   ticks_delay = (uSec * (MCU_SYSCLK / (1000000)));
   ticks_end = ticks_start + ticks_delay;
   if(ticks_end < ticks_start)
   {
      while( DWT_CYCCNT > ticks_end ); 
   }
   while( DWT_CYCCNT < ticks_end );

}

void dwt_delay_ms(uint32 mSec)
{
   while(mSec--)
   {
      dwt_delay_us(1000);
   }
}

Labels (1)
1 Solution
1,232 Views
mjbcswitzerland
Specialist V

Hi

    DEMCR |= DHCSR_TRCENA;          // enable trace for DWT features
    DWT_LAR = DWT_LAR_UNLOCK;       // unlock access to DWT registers
    DWT_CYCCNT = 0;                 // reset the cycle count value
    DWT_CTRL |= DWT_CTRL_CYCCNTENA; // enable the cycle counter

DWT_LAR address is 0xe0010fb0
and the unlock value is 0xc5acce55

This is not easy to find because it is difficult to find in the ARM documents and also some ARM documents declare the wrong address of 0xe0000fb0 too! [But it is correct in the CMSIS M7 header].

To find the details one must first read the "Arm®v7-M Architecture Reference Manual" document https://static.docs.arm.com/ddi0403/e/DDI0403E_d_armv7m_arm.pdf?_ga=2.156998395.1337051421.154413414...
which finally refers to the "ARM ® CoreSight ™  Architecture Specification"
http://infocenter.arm.com/help/topic/com.arm.doc.ihi0029e/coresight_v3_0_architecture_specification_...
page B2-61

Regards

Mark

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2 Replies
1,233 Views
mjbcswitzerland
Specialist V

Hi

    DEMCR |= DHCSR_TRCENA;          // enable trace for DWT features
    DWT_LAR = DWT_LAR_UNLOCK;       // unlock access to DWT registers
    DWT_CYCCNT = 0;                 // reset the cycle count value
    DWT_CTRL |= DWT_CTRL_CYCCNTENA; // enable the cycle counter

DWT_LAR address is 0xe0010fb0
and the unlock value is 0xc5acce55

This is not easy to find because it is difficult to find in the ARM documents and also some ARM documents declare the wrong address of 0xe0000fb0 too! [But it is correct in the CMSIS M7 header].

To find the details one must first read the "Arm®v7-M Architecture Reference Manual" document https://static.docs.arm.com/ddi0403/e/DDI0403E_d_armv7m_arm.pdf?_ga=2.156998395.1337051421.154413414...
which finally refers to the "ARM ® CoreSight ™  Architecture Specification"
http://infocenter.arm.com/help/topic/com.arm.doc.ihi0029e/coresight_v3_0_architecture_specification_...
page B2-61

Regards

Mark

1,232 Views
shenjiaqihi
Contributor I

Hello Mark,

   I'm very grateful for your great support. It is really solved by adding DWT_LAR.

   And DWT_LAR address is 0xe0001fb0 , not 0xe0010fb0.

   

Best Regards,

Shen

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