I had at least 2 misconceptions that stopped memory to pwm edma from working. First, channel interrupts must be enabled along with the dma bit in FTMx_CxSC, says right on page 995 (in table format) that both have to be enabled to generate the dma request. On chips with non-flex timers and regular dma, only the dma bit has to be set to generate a dma request. Second, the channel event flag will never be set if the compare value is zero. To begin a memory to pwm transfer you have to transfer the first byte manually if the CxV value is initially zero. On chips with non-flex timers, channel flag is set when compare value is zero and timer value is zero but on flex timers, channel flag never gets set if the compare value is zero no matter what value the counter reaches. This means that a dma transfer to pwm is stopped if any data is zero. I'm not 100% happy with this solution but I think I can make it work for my application.