EVK-MIMXRT1064 Right Linker file to use

[max_yang1]

My development tool is Keil uVision MDK with following packages:

Keil::MIMXRT1064-EVK_BSP
NXP::EVK-MIMXRT1064_BSP
NXP::MIMXRT1064_DFP

My question is based on the example from SDK: driver_examples\lpuart\interrupt.

Three linker file were provided in this example:

MIMXRT1064xxxxx_flexspi_nor.scf
MIMXRT1064xxxxx_ram.scf
MIMXRT1064xxxxx_sdram.scf.

In all of three, MIMXRT1064xxxxx_flexspi_nor.scf is the only one that allow me load and boot from nor flash. The image linked with other two can not be programmed into flash.

But with MIMXRT1064xxxxx_flexspi_nor.scf, the image built shows huge amount RAM usage for this simple program. Looking further into it, it reserved all OCRAM for a region that from comments "for MPU configuration"

Can someone point me to some right linker file,

1) For application that could use SDRAM on board, but can also be program and boot from flash

2) for small applications that does not used SDRAM, but only OCRAM.

Thanks for advice

Max

[max_yang1]

Jing,

thanks for reply.

About 1) If I donot intent to boot from SDRAM, but still use RAM for application, what is the steps to setup that SDRAM after bootup?

About 2) If we donot use SDRAM, is that reserved region for MPU still required? Do you have an example Linker that uses the rest of OCRAM for the application too, in addition to ITCM/DTCM?

[jingpan]

Hi @max_yang1 ,

1. If you enable DCD, bootROM can configure SEMC/SDRAM before application start. If you don't use DCD, you can set SEMC by yourself. DATA/CODE is copied by yourself.

2. To put data or code into OCRAM, you can modify .scf file like this

RW_m_ncache m_data2_start m_data2_size {
* (bigbuffer)
}

Then in your code, announce a buffer like this 

int mybuffer[1024] __attribute__((section("bigbuffer")));

There is lots of guide about how to modify keil .scf file. You can search them in internet. 

https://developer.arm.com/documentation/dui0474/latest/scatter-file-syntax/syntax-of-a-scatter-file

Regards,

Jing

[max_yang1]

Jing,

About 2), I certainly can do that. But first, as it marked that region is reserved for MPU configuration how much I should have reserved for it. But I rather not do it that way with special macro all cross my code.

For a typical embedded application 1M on chip memory serves purpose. If I chose that 1064 for my application, I expect some basic configuration that allow me use this 1 M to the maximum without special macro all cross my code.

Again I'd like to see how easy to get a basic configuration/linker (apparently code generated now is coupled with link file), to use for an embedded application booting from flash, use all 1M on-chip memory.

Hope you understand my point.

Max

[jingpan]

Hi @max_yang1 ,

In RT1064 DTCM and OCRAM address space is discontinuous. So, it can't use a simple link file to allocate all data discontinuously. 

By default, DTCM is noncacheable and OCRAM is cacheable. DTCM speed is as fast as M7 core but OCRAM is 166M maximum. Cache is used to speed up OCRAM access. But cacheable space is not shareable. That means if a buffer is accessed by both M7 and DMA, it should be put into noncacheable space. MPU is used to manage this attribution. If your application hasn't such concern, you needn't reserve any OCRAM space for MPU.

Regards,

Jing

[max_yang1]

Jing,

Let me copy line 114-117 from the linker file in question, here

"RW_m_ncache m_data2_start EMPTY 0 {
}
RW_m_ncache_unused +0 EMPTY m_data2_size-ImageLength(RW_m_ncache) { ; Empty region added for MPU configuration
}

"

You mentioned in one of previous replies that MPU is always required. So, what is maximum size required for MPU referring line 116 "RW_m_ncache_unused +0 EMPTY m_data2_size-ImageLength(RW_m_ncache) { ; Empty region added for MPU configuration" with/without uncachable buffers. As it is now it takes everything available from 20200000.

If I know how to calculate how much is required by MPU from there. I could use the rest for my application, without causing any problem to MPU, you think that is reasonable?

Max

[jingpan]

Hi @max_yang1 ,

BOARD_ConfigMPU() is never changed in every example in SDK. So link file must have this. But if you debug into this function, you'll find Image$$RW_m_ncache_unused$$Base[] equal to Image$$RW_m_ncache_unused$$ZI$$Limit[] equal to 0x20200000.

So the MPU function doesn't set noncacheable area.

RW_m_ncache m_data2_start EMPTY 0    // It means this section is empty and lenght is 0

RW_m_ncache_unused +0 EMPTY m_data2_size-ImageLength(RW_m_ncache)  //It means it's size is changed automatically according to what you've put in RW_m_ncache.

Regards,

Jing 

[max_yang1]

"RW_m_ncache_unused +0 EMPTY m_data2_size-ImageLength(RW_m_ncache)  //It means it's size is changed automatically according to what you've put in RW_m_ncache."

Yes I understand that.

But from comment that part is used for MPU attribute. So how much is required for MPU? or how much we can use that part for our software?

In a particular case, if there is no code put in "RW_m_ncache", can I use whole "c0000" memory for my software without causing problem to MPU?

Thanks for help,

Max

[jingpan]

Hi @max_yang1 ,

1. But from comment that part is used for MPU attribute. So how much is required for MPU? or how much we can use that part for our software?

MPU require nothing. You can use all OCRAM. The link file and MPU config code just sperate it to two part, cacheable and noncacheable.

2. In a particular case, if there is no code put in "RW_m_ncache", can I use whole "c0000" memory for my software without causing problem to MPU?

Yes to code and may have problem to data cache.

Regards,

Jing

[max_yang1 · Accepted solution]

So the comment on this line is really misleading then.

"RW_m_ncache_unused +0 EMPTY m_data2_size-ImageLength(RW_m_ncache) { ; Empty region added for MPU configuration"

Thanks for clarification.

Max

[jingpan]

Hi @max_yang1 ,

1. Booting from SRAM is similar to booting from SDRAM. When boot from SDRAM, you need DCD to enable SDRAM. If boot to SRAM, you can configure SEMC by your software.

2. Yes, MPU is always required. You needn't a new link file. The default one is enough.

Regards,

Jing

[max_yang1]

Jing,

1)Sorry. I was not clear. I would still boot from Flash, however I would also like use SDRAM for extra memory for software buffer etc., after boot up. 

2) The default linker file in question, only uses 128K ITCM and 128 DTCM for software, all reset from 20200000 all reserved for MPU. In theory, application only use 256K maximum. How can we use part of that huge memory for software if I have keep some MPU configuration? 

[jingpan]

Hi @max_yang1 ,

1) For application that could use SDRAM on board, but can also be program and boot from flash

The project generated by MIMXRT1064xxxxx_sdram and MIMXRT1064xxxxx_ram can't use Keil to download to QSPI. First, obviously the project address is not in QSPI. Keil can only download code to running address. Second, these two link file are missing FCB and IVT. Without them ROMboot can't config QSPI and get the image head. Third, MIMXRT1064xxxxx_sdram is missing DCD which is SDRAM config information needed by ROMboot to configure SDRAM. You can compare qspi link file with them, add these section to them. Or you can refer to this guide. https://community.nxp.com/t5/i-MX-RT-Knowledge-Base/I-MX-RT-How-to-booting-to-SDRAM/ta-p/1125054

2)for small applications that does not used SDRAM, but only OCRAM.

You needn't care about the big ZI space. It is only used for MPU to configure OCRAM attribute.

Regards,

Jing