Hi team ,
I would like to share an experiment that about the Fast IO - zero wait state access of KL series . Detail please refer to attached file .
I have done some experimenting on FRDM-KL02Z32 and have problems with FGPIO switching performance with Bus Clock 4 MHz and below.
The 8MHz Bus Clock works normal 125 ns cycle per FGPIO switch, but with 4 Mhz Bus Clock, I get unstable switching from 250 ns to 500 ns.
To me it looks like System Clock and Bus Clock have synchronization problems.
I checked with FEI and 24 MHz divided down to Bus Clock and also with IRC 4 MHz directly to Bus Clock in FBI mode same result.
Can someone recheck or explain?