In the current debugging stage, I have encountered a problem: my CPLD provides a reset configuration for the LS1043a chip, the RCW is set to 9F, when powering up, Hreset can monitor the high level of 2ms, and then pull it all the way, the poreset signal is 200ms low and then pulled up, Hreset has a pull-up resistor, why is it always low, with a voltage roughly Hreset has a pull-up resistor, why is it always low, the voltage is around 300mV. I later configured RCW, the Hreset signal was pulled up normally after power-on, and the voltage was 1.8V, but the LS1043a was connected to the emulator and reported an error, and after checking against the checklist, the power-on timing was basically correct, but the LS1043a connected to the emulator and reported an error, and the device could not be detected.
It has been checked:
1. Whether the power-on timing and oscilloscope measurement are correct;
2. CPU power supply voltage includes core voltage, correct;
Any other solutions or any other suggestions?
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