Hi at all,
I will develop a board with the mcf5208. 
Now I will know how to connect one or two (assembly option) respectively sdrams (K4S281632) to the cpu.
These signals are clear to me: -1st sdram D16-D31 to dq0-dq15
-dqm3 to udqm
-dqm2 to ldqm
-2nd sdram D0-D15 to dq0-dq15
-dqm1 to udqm
-dqm0 to ldqm
And what's about the address lines and chip selects? 
Same address lines in 16bit and 32bit?
One chip select for both modes (16/32bit) or two?
thx
fevernova
...let's start new.
I will use sdram by 16bit architecture (k4s281632I-ui75) and flash (s29gl032a90tfir4) by 16bit architecture.
So I'll take a full 32bit bus mode for 32bit sdram controller and 32bit for flexbus (dramsel=1).
As standard memory I will use one 16bit sdram and so I thought I have to connect the sdram to the upper data lines of the sdram controller:
sdram dq0=cpu d16
sdram dq1=cpu d17
...
sdram dq15=cpu d31
sdram ldqm=cpu sddqm2
sdram udqm=cpu sddqm3
sdram cs=cpu sdcs0
sdram a0=cpu a0
sdram a1=cpu a1
...
sdram a10=cpu sd_a10
...
sdram n.c./a12=cpu a12
sdram ba0=cpu a14
sdram ba1=cpu a15
And here isthe flash connection:
flash a0=cpu a1
flash a1=cpu a2
...
flash n.c./a21=cpu a22
flash cs=cpu cs0
flash dq0=cpu d16
flash dq1=cpu d17
...
flash dq15=cpu d31
refer to page 287 (flexbus, data byte alignment) in manual.
A an assembly option I will use a second sdram by 16bit to built a 32bit architecture by 2x16bit.
So I take the second sdram and connect it in this way:
sdram dq0=cpu d0
sdram dq1=cpu d1
...
sdram dq15=cpu d15
sdram ldqm=cpu sddqm0
sdram udqm=cpu sddqm1
sdram cs=cpu sdcs0
sdram a0=cpu a0
sdram a1=cpu a1
...
sdram a10=cpu sd_a10
...
sdram n.c./a12=cpu a12
sdram ba0=cpu a14
sdram ba1=cpu a15
Is it the correct connection?
I hope it is understandable.
thx, fevernova
