HC08: please guide me...(ISR,vectors,heap)

[girishrevadigar]

Dear sir/Madam,

 I am working on the code warrior tool for HCS08 microcontroller.
The question i am  asking is ,
1) can we have multiple heap? and how if possible?
2) how to specify reset vectorsto the process?
3)How to specify the ISR's? can we specify it dynamically?
(Table based /PRM based?

please give me the answers for my queris as early as possible.
Thank you,
Girish Revadigar

Message Edited by CrasyCat on 2007-04-13 11:33 AM

[CrasyCat · Accepted solution]

Hello

>1) can we have multiple heap? And how if possible?
  Well due to the limited RAM available on a HC08, I do not think that using multiple heap is appropriate or recommended. We just provide ANSI C standard memory management functions, so using the library one single heap is possible.

If you wish to support multiple heaps you have to implement them yourself. But once again, think about it first. You do not have kilobytes of RAM available on those systems.

>2) how to specify reset vectors to the process?

>3)How to specify the ISR's? Can we specify it dynamically?
    You can define the vector table entries either using the VECTOR ADDRESS command in the application .PRM file or defining a table of constant function pointer allocated at an absolute address in the C source file.

First variant: Writing the following in your .prm file will write the address of the function _Startup to 0xFFFE-0xFFFF:

  VECTOR ADDRESS 0xFFFE _Startup

Second variant:

You can define a table of function pointer allocated at an absolute address as follows:

void (* const _vect[])() @0xFFCC = {   /* Interrupt vector table */
         Cpu_Interrupt,                /* Int.no. 25 Vrti (at FFCC)                  Unassigned */
         Cpu_Interrupt,                /* Int.no. 24 Viic1 (at FFCE)                 Unassigned */
         AD1_Interrupt,                /* Int.no. 23 Vatd1 (at FFD0)                 Used */
         Cpu_Interrupt,                /* Int.no. 22 Vkeyboard1 (at FFD2)            Unassigned */
         Cpu_Interrupt,                /* Int.no. 21 Vsci2tx (at FFD4)               Unassigned */
         Cpu_Interrupt,                /* Int.no. 20 Vsci2rx (at FFD6)               Unassigned */
         Cpu_Interrupt,                /* Int.no. 19 Vsci2err (at FFD8)              Unassigned */
         Cpu_Interrupt,                /* Int.no. 18 Vsci1tx (at FFDA)               Unassigned */
         Cpu_Interrupt,                /* Int.no. 17 Vsci1rx (at FFDC)               Unassigned */
         Cpu_Interrupt,                /* Int.no. 16 Vsci1err (at FFDE)              Unassigned */
         Cpu_Interrupt,                /* Int.no. 15 Vspi1 (at FFE0)                 Unassigned */
         Cpu_Interrupt,                /* Int.no. 14 Vtpm2ovf (at FFE2)              Unassigned */
         Cpu_Interrupt,                /* Int.no. 13 Vtpm2ch4 (at FFE4)              Unassigned */
         Cpu_Interrupt,                /* Int.no. 12 Vtpm2ch3 (at FFE6)              Unassigned */
         Cpu_Interrupt,                /* Int.no. 11 Vtpm2ch2 (at FFE8)              Unassigned */
         Cpu_Interrupt,                /* Int.no. 10 Vtpm2ch1 (at FFEA)              Unassigned */
         Cpu_Interrupt,                /* Int.no.  9 Vtpm2ch0 (at FFEC)              Unassigned */
         Cpu_Interrupt,                /* Int.no.  8 Vtpm1ovf (at FFEE)              Unassigned */
         Cpu_Interrupt,                /* Int.no.  7 Vtpm1ch2 (at FFF0)              Unassigned */
         Cpu_Interrupt,                /* Int.no.  6 Vtpm1ch1 (at FFF2)              Unassigned */
         Cpu_Interrupt,                /* Int.no.  5 Vtpm1ch0 (at FFF4)              Unassigned */
         Cpu_OnClockMonitorInt,        /* Int.no.  4 Vicg (at FFF6)                  Used */
         Cpu_Interrupt,                /* Int.no.  3 Vlvd (at FFF8)                  Unassigned */
         Cpu_Interrupt,                /* Int.no.  2 Virq (at FFFA)                  Unassigned */
         Cpu_Interrupt,                /* Int.no.  1 Vswi (at FFFC)                  Unassigned */
         _EntryPoint                   /* Int.no.  0 Vreset (at FFFE)                Reset vector */
 };

Please take a look at how ProcessorExpert is dealing with that as an example.

CrasyCat