CW 7.0 Processor Expert generates files with wrong order of the codelines

[aroonster]

I'm working with CW 7.0 for DSC 56F8xxx.

With the help of the Processor Expert I had configured the SPI-Port.

The automatic generated file that configured the SPI has the wrong codelineorder.

setRegBits(SPI0_SCR,SPI0_SCR_SPRIE_MASK);     /* Enable receiver interrupt */
setRegBit(SPI0_SCR,SPE);                                          /* Enable 'SPI0' device */
setReg16(SPI0_SCR, 25792);                                       /* Set control register */ 

/* SPI0_SCR: SPR2=0,SPR1=1,SPR0=1,DSO=0,ERRIE=0,MODFEN=1,SPRIE=0,SPMSTR=0,CPOL=1,CPHA=1,SPE=0,SPTIE=0,SPRF=0,OVRF=0,MODF=0,SPTE=0 */
In line 3 the two bits that are set in line 1 & 2 will be cleared.

If I change the order of the codelines to 3, 1, 2, it work properly.

Is this a Processor-Expert-Bug or what did I wrong?

Please let me know if somebody else knows such a problem, thanks!

[ProcessorExpert]

Hello,
I am sorry, but from your description I don't know which CPU do you use, wchich bean do you use and how did you set it.
Anyway, I recommend to update to the latest version of the CodeWarrior - V8.0 or at least CodeWarrior 7.3.
There were many updates, fixes and improvements in Processor Expert since the CodeWarrior 7.0.
CodeWarrior updates are available on the Freescale website (try this link:
http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=56800-E-DSC-UPDATES&parentCode=null&n... )
best regards
Petr Hradsky
Processor Expert Support Team
UNIS

(Alban linked)

Message Edited by Alban on 2006-08-29 12:04 PM