Start Up Time HC908AP16 >=900ms ???

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Start Up Time HC908AP16 >=900ms ???

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Roland
Contributor I
Hello!
 
I have a problem with my AP16 (HC908AP16CFAE - 2L47P)
I changed the clock source from the internal OSC to the crystal OSC (32,768kHz).
 
When I used the internal OSC I had a start-up-time from about 280ms.
But now with the X-tal OSC I have a start-up-time from about 900ms.
 
I don't know where my mistake is!
 
Please can you help me?
 
Thanks in advance!
 
Roland
 
Here the Code:
 
Code:
void main(void) { CPU_INT8U speicher=0,i=0,dontprg=0,timeout_sec=0,timeout_ms=0,temp_timer=0;  CPU_INT16U pwm_X=0,pwm_Y=0,crc=0; CPU_INT16U angle_X_real=0,angle_Y_real=0; CPU_INT16U average_temp=123,min=2000,max=0; CPU_INT8U temp_average[8]={123,123,123,123,123,123,123,123};  DDRA_DDRA6=1;    /* LED - OUT */ LED=1;           /* 280ms with internal OSC - 900ms with X-tal */   CPU_INIT();   /* 270ms */´......................................../* 32,768kHz Quarz */const volatile MORSTR _MOR @0x0000FFCF = { 0xFF };/* MOR: OSCSEL1=0,OSCSEL0=1 *///const volatile MORSTR _MOR @0x0000FFCF = { 0x7F };void CPU_INIT (void){  /* internal OSC */  /*  CONFIG1 = 17;                        // Set the CONFIG1 register                                        // CONFIG2: STOPICLKEN=1,STOPRCLKEN=0,STOPXCLKEN=0,                                       // OSCCLK1=0,OSCCLK0=0,—–=0,˜™=0,SCIBDsrc=1   CONFIG2 = 129;                       // Set the CONFIG2 register   PCTL_BCS = 0;                        // Select clock source from XTAL   PCTL_PLLON = 0;                      // Disable the PLL   PMS = 727;                           // Set the multiplier   PMRS = 208;                          // Set the range select   PCTL = 0;  PCTL_VPR = 1;  PBWC = 128;                          // Select the operating modes   PCTL_PLLON = 1;                      // Enable the PLL     while(!PBWC_LOCK);                   // Wait   PCTL_BCS = 1;                        // Select clock source from PLL     __asm("nop");  __asm("nop");    */ /* 32,768kHz Quarz*/   // CONFIG1: COPRS=0,LVISTOP=0,LVIRSTD=0,LVIPWRD=1,LVIREGD=0,SSREC=0,STOP=0,COPD=1   CONFIG1 = 17;                        // Set the CONFIG1 register   // CONFIG2: STOPICLKEN=0,STOPRCLKEN=0,STOPXCLKEN=0,OSCCLK1=1,OSCCLK0=0,??=0,??=0,SCIBDsrc=1   CONFIG2 = 0x11;                       // Set the CONFIG2 register   //PCTL_BCS = 0;                        // Select clock source from XTAL   PCTL_PLLON = 0;                      // Disable the PLL  PCTL_PLLIE = 0;   PCTL_PRE=0;  PCTL_VPR=1;  PMSH=0x01;  PMSL=0xE9;  PMRS=0xD1;  PMDS=0x01;  PBWC = 128;                          // Select the operating modes "Auto=1"  PCTL_PLLON = 1;                      // Enable the PLL    while(!PBWC_LOCK);                   // Wait   PCTL_BCS = 1;                        // Select clock source from PLL     __asm("nop");  __asm("nop");

 
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bigmac
Specialist III
Hello Roland,
 
It appears you have measured is an oscillator settling time of 620 ms, followed by a lock period for the PLL of about 280 ms.  For a 32 kHz crystal, the 620 ms settling period does not seem unreasonable.  The lower the crystal frequency, the longer the period required for the build-up of oscillations - if you have an oscilloscope with a low capacitance probe, you may be able to confirm by directly observation.
 
Regards,
Mac
 
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Roland
Contributor I
Hello bigmac,
 
No it isn't the settling time of the oscillator! (The oscillator works after 210ms wonderful)
I have made some other tests and it seems that this time is depending from the code!
 
If I have only the CPU_INIT function in my main function, it will need "only" 370ms.
 
I can't understand this because I have only changed the oscillator source and I change the osc source "after" my trigger point! (LED=1)
Code:
void main(void) { DDRA_DDRA6=1;    /* LED - OUT */ LED=1;           /* 280ms with internal OSC - 900ms with X-tal */  CPU_INIT();   /* 270ms */

I think the controller need this time in the startup function, but why need it more time than with the internal oscillator?

I hope anybody can help me!

Roland

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bigmac
Specialist III
Hello Rolland,
 
I suggest you examine the number of bus cycles (using full chip simulation) consumed by the CPU_INIT() function, up to the point where the PLL output is selected as the bus clock source.  Prior to this point, the bus frequency will be one quarter the oscillator frequency, so code execution at this rate will take a significant period, that might account for the differences you are observing.
 
Using the internal clock ICLK, the frequency will lie somewhere between 64 to 104 kHz, depending on temperature, voltage, and unit-to-unit variation, with a typical value of say, 80 kHz.  This is significantly higher than the crystal frequency.
 
Regards,
Mac
 
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