Set Program Counter

[Mev]

Hi, I want call a function, which set the Program Counter and resets the system. Is there somebody who has any experiences? I want to program it in C. Best Regards MEV

[erooll]

For HC08, I used illegal Opcode to reset MCU and it works, and you can know the cause of reset, because they have a register that indicates this.
I guess that for HS08 this also works.
I suggest this procedure if you want reset MCU.

Thanks

[fabio]

Hi Mev,

The following code is part of my new book about the HCS08. It is a simple software reset based on the illegal opcode feature available in the HCS08 CPU.

Code:

void reset(void){  unsigned int temp;  temp = 0x9E00;  #asm    LDHX  @temp // load the address of temp into H:X    JMP   ,X // jump to the address pointed to by H:X  #endasm}

To reset your system, simply call reset().

Best regards,

Message Edited by fabio on 2008-02-21 09:54 PM

[JimDon]

Cute, but lets not use the stack at all, and save some Flash.

Code:

const static int _illopcode = 0x9e00;#define RESET()  asm  JMP _illopcode; 

 

[CompilerGuru]

why not

#define ILLEGAL_OPCODE 0x9E00
#define RESET()  __asm DCW ILLEGAL_OPCODE

(does it actually need 2 bytes, or does a single DCB 0x9E also work?)

Daniel

Message Edited by CompilerGuru on 2008-02-22 06:19 AM

[JimDon]

Hey, even better! I couldn't find the proper syntax for dc.w in the "C" asm command. Didn't think to try DCW.
$9E means a two byte opcode. There are single byte opcodes that work:

__asm DCB $8D;
__asm DCB $AC;

But I thought maybe they would get used later, as you would want to use single byte opcodes first.
But I just made that up, I suppose any current illegal opcode could get used at any time.
Is there any statement that a certain opcode will never get used?

See page 234 in HCS08RMv1/D

[fabio]

Hi Jim and Compilerguru,

Your alternatives are cool!

Compilerguru: no, you can't use only 0x9E as a single byte opcode because this is a escape code for the second opcode page (0x9E means that a second opcode byte follows). In case the second byte is a valid opcode (there are some of them defined on page 2), the instruction is valid and no ILAD reset will occur.

Jim: no, you can't use 0x8D and 0xAC because they are already used in the HCS08 CPU v4 (Flexis devices). These opcodes are used for the RTC and CALL instructions.

Other alternatives for ILAD reset:

1- Attempt to execute the STOP instruction when it is disabled (if your application is not using low power stop modes);
2 - Attempt to execute the BGND instruction when background debug is not active. This is very interesting. I always wondered why Freescale designed this is instruction to be illegal when debug mode is not active. If it was treated just as a NOP, it would be harmless when out of debug mode and act as a breakpoint when in debug mode.

Best regards,


Message Edited by fabio on 2008-02-22 12:04 PM

[JimDon]

Well, I am quite disappointed that the document I mentioned does not reflect the Flexis instructions.

This is supposed to the reference manual for Flexis as well.

I am also very upset with the CFRM that is supposed to be for Flexis and is so old it does not even mention V1.

However, my gut feel for single byte opcodes was correct. I did start off designing CPUs when you did that with 7400 chips, and using an unused opcode was actually a big no no,. Of course the programmers did any way.

Is it possible that we could get Freescale to actually designate an opcode as RESET? Then we could be sure. It cold be a two byter, as you don't do this very often.

[fabio]

Jim,

I agree with you in all aspects: the Coldfire family reference manual and the HCS08 reference manual need some urgent review to include the newest features added to both families.

The HCS08 reference manual is very old and references only the GB and GT devices.

For the CFv1, there is a white paper (V1CFWP.pdf) that describes the CFv1 core and sheds some light on the V1 core operation. This white paper also compares the CF ISA_C against the CF ISA_A and the S08 ISA.

It would be nice if Freescale could merge these documents into a single Coldfire reference documentation.

Best regards,

[JimDon]

Well HCS08RMV1 has a date 05/2007 and Flexis QE was cast in stone by then, so there is no excuse.
Whats more this document should be more family oriented, and not use specific processors 
Or a new one for Flexis.

V1CFWP is 30% marketing hype, and leaves out things and it is a really pain to sort out the other document. You can't cover a processor like the V1 in 72 pages.

It such a shame - they went to all this trouble, and then just couldn't manage to get a tech writer on the case.
Same with example code - weak. That's why we answer the same questions over and over.

[Mev]

I do not want that the Watchdog initiate the reset. I want to solve the problem by a vector and set the program counter. How can I realize that? Could you give me an example? Thanks.

[bigmac]

Hello,

You originally stated that you required to "reset the system".  This will not occur if you simply jump to the location defined by the reset vector.  For the hardware to also undergo reset, you will need to use one of the three methods outlined by Ake - illegal op code, illegal address, or COP timeout.  The illegal op code can be implemented using inline assembler.

Regards,

Mac

[Ake]

Hi,

You could either jump to place where there is no memory or you could wait for a watchdog (COP) reset.

Another would be to execute an illegal instruction, that would reset the PC.

You could ofcourse load the reset vector and jump to it, but an all those cases, I don't think that you would get a true system reset.

Regards,

Ake