Problem with M68HC908QT4A timer when changing mode

[sauliuz]

Hello,

I am tring to set up half-duplex SCI according to freescale app. notes. But Can not solve one problem. When I try to send a byte I set timer into output compare mode with:

TSC_TSTOP = 1; // prepare to change channel function (according pdf note)
TSC_TRST = 1; // prepare to change channel function (according pdf note)
TSC0_MS0B = 0;
TSC0_MS0A = 1;
TSC0_ELS0B = 1;
TSC0_ELS0A = 1; // *** I NEED IT TO BE HIGH
TSC0_CH0IE = 0; // input capture interrupt disable
TSC_TOIE =1; // timer overflow interrupt enable
TMOD = TMOD_BITE;//set timer period
TSC_TOF = 0; // take off timer overflow flag
TSC0_CH0F = 0; // channel interrupt flag off
TCNT = 0; // reset timer counter
TSC_TSTOP =0; // start timer

Then from byte and manage to do it correctly. First of all I need start bit (low pulse for 140us). I form it with my byte forming routine. The pronlem is that I CAN NOT keep ouput on high level while setting it to output compare mode. When I set "TSC0_ELS0A = 1;" the output for some reason goeas down (logic 0) until it is corrected by my byte forming routine. How can I keep it High?

Message Edited by sauliuz on 2006-10-2007:18 AM

[bigmac]

Hello,

I wonder if your problem might be because you are changing the TSC0 register one bit at a time - the sequence may be critical.  I would suggest to write all bits simultaneously and see if the problem persists.  You might also try writing a value that sets the bits MS0B:MS0A:ELS0B:ELS0A to all zeros, prior to writing the combination 0111 that you require for output compare.

Regards,

Mac