Flash rom rountines using hc908 jk3 PROBLEMS

lazycat · ‎03-06-2007

Hello,

i am quite new to mcu , so pardon me if i ask some obvious question haha.. I have been trying to write data to the flash for some time after reading through the flash posts in the forum. I have used both method ; the assembly and c language , both copying flash to the ram (if my code is not wrong). However, when my breakpoint reached (PRGRNGE.) or (ERARNGE). it cannot go into the rom rountines stating illegal address . My codes are referenced from an2346 an1831 and one more manual for the copying ram in c. I am really on my wits' end now. Hope some one can give me some valuable advice .

Another question that is bugging me is do we need to set some parameters in the debugger so that flash programming can be enabled?? i am using codewarrior 3.1 and i am afraid it is my hardware that is the stepping stone haha...Thanks for any help

Can i confirm that my reset port need to be held high (VDD+Vhi) in the debugger for the rom routines to work?

If i am not using rom routines, does i need to held it high too??

Thanks for any help!

Message Edited by lazycat on 2007-03-0605:53 PM

Message Edited by lazycat on 2007-03-0605:54 PM

lazycat · ‎03-09-2007

Hi all,

THANKS pegs and rocco! now i know what is the problem. ya btw can M68ICS08jk simulator emulate the flash fully coz i happen to find 1

Thanks for any reply!

lazycat · ‎03-12-2007

Hi all,

Thanks rocco peg and big mac, i finally can program and erase successfully using M68ICS08jk/jl

THANKS for the help!

lazycat · ‎03-08-2007

hello all,

after editing the prm file of the above code, there is now no illegal message but a new one popped out "write protection" haha, but i thought i had already set the flbpr to ff.

Thanks for any reply!

rocco · ‎03-08-2007

Hi, LazyCat:

You are using an MMEVS! Well that's a horse of a different color.

I was assuming, as Mac and Peg probably were, that you were running inside your chip. But the MMEVS does not work that way.

When you debug with an MMEVS or MMDS, there is no flash. The code executes out of ram on the MMEVS. The MMEVS knows that the flash portion of the memory space is read-only, so if you try to write to that memory from your code, the MMEVS firmware generates a write-protect violation. There is no way around that, except to not write there.

The MMEVS cannot emulate flash either, and I had to build a lot of hoops, and then jump through them in order to get my flash-bootstrap routines debugged. The main hoop was to use conditional assembly statements to remove the actual write to the flash address space when running the bootstrap in the emulator. This got me around the write-protect violations.

When it comes time to run in real silicon, I don't think that there is any way that you can program the flash from an MMEVS or an MMDS. I use a separate programmer (HC08PGMR) to put my flash-bootstrap into the microcontrollers before having the boards assembled. I then download the final firmware through the serial port, once the boards are tested.

peg · ‎03-08-2007

Hi lazycat,

Well when I saw the MMEVS I thought "well that could have something to do with it, where's rocco?"

Low and behold, he pops up and nails it.

As for some other points. Erased FLASH reads as $FF.

Its no good simply writing to FLBPR its implemented in FLASH. While testing it would be easier just to start with unprotected FLASH anyway. When you get it going then protect it and try more.

lazycat · ‎03-08-2007

Hey thanks alot peg,

But i think i need to trouble you again sorry . I have read AN2874 and also used the code for debugging but it encountered the same message too. I am currently using Motrola Modular evaluation system(MMEVS) for dubugging.

Is it that when u debug and check the memory where it is intended to be erased, it will read all ff??

During this period i tried using the method without rom routines but it encountered the same problem.

I think it is due to my carelessness or limited knowledge haha .Below is my code thanks!

*******************************************************************************************************

#include <hidef.h> /* for EnableInterrupts macro */
#include <MC68HC908JK3.h> /* include peripheral declarations */

void initMCU(void);
void initTimer(void);

unsigned char *address_flag;
unsigned int startadd;

unsigned char *addresserase_flag;

unsigned int add;
unsigned char cycle;
unsigned char READ;

/**********************/

#pragma CODE_SEG ToCopyToRAM

void flash_erase(void) {

FLBPR= 0XFF;

FLCR=0x02; //set erase bit

READ = FLBPR;

// FLCR=0x02; //clear mass bit

addresserase_flag=(unsigned char*)0xFBDF ;
*addresserase_flag = 0;

asm{
ldx #7
loop1:
dbnzx loop1 //(10us)
}

FLCR=0x0A; //set hven bit

asm {

    ldx #16400

  tloop :


         dbnzx tloop //(4ms)
}

FLCR=0x08; //clear erase

  asm{
  ldx #4
loop2:
dbnzx loop2 ;   //(5us)
}

FLCR=0; //clear hven bit

asm{
ldx #1
loop3:
dbnzx loop3; //(1us)
}

}
#pragma CODE_SEG DEFAULT

extern char __SEG_START_ToCopyToRAM[];
extern char __SEG_SIZE_ToCopyToRAM[];

void flash_erase(void) ;
#define Start_Copy_In_RAM __SEG_START_ToCopyToRAM
#define Size_Copy_In_RAM __SEG_SIZE_ToCopyToRAM

void CopyInRAM(void)

{
char *srcPtr, *dstPtr;
int count2;

srcPtr = (char*)Start_Copy_In_RAM;

dstPtr = (char*)&flash_erase;

for (count2 = 0; count2< (int) Size_Copy_In_RAM;
count2++, dstPtr++, srcPtr++) {
*dstPtr = *srcPtr;
}
}

//**********************************************************************************************
//Timer Initialisation
//**********************************************************************************************

/*void initTimer(void)
{
   TSC = 0x20;
   TMODH = 0x00;
   TMODL = 0x10; //ms
}       */

//**********************************************************************************************
//Main Function
//**********************************************************************************************

void main(void)
{
     initMCU();
     //initTimer();
   // INTSCR|=0x06;                                                 //BR: Clear the IRQ latch; Disable IRQ INT


  EnableInterrupts;
__RESET_WATCHDOG();                                               //Note as of now the COP module is disabled

TSC_TSTOP = 0;       //active timer
TSC_TOIE = 1;

DisableInterrupts;
  CopyInRAM();
  flash_erase();
  EnableInterrupts;

for(;

;

}
//**********************************************************************************************
//Initialisation
//**********************************************************************************************

void initMCU(void) {

DisableInterrupts; //Disable interrupts

CONFIG1=0x11;//Disabled Power to LVI module, COP enabled

// 0x09 LVI enabled, 5V LVI;// 0x01 LVI enabled + COP disabled, 3V LVI; // 0x39 LVI disabled + COP disabled

// 0x00, LVI 3V, COP enabled

//BR: COP disabled first, LVI is enabled (mazm) bit7: 0011 1001 bit1
// Out of stop mode bit7 - COPRS: COP rate select bit; 1: (8176) BUSCLKX4 cycle to time out; 0

262128 BUSCLKX4)
// bit7 - COPRS:In stop mode, Autowakeup period selection ; 1: 2^9 * INTRCOSC ; 0: 2^14 * INTRCOSC
// bit6 LVISTOP - LVI enable in stop mode ; 0 - Disable ; 1 - Enable;
// bit5 LVIRSTD -LVI Reset disable bit; 0 - Enable 1- Disable
// bit4 - LVIPWRD - LVI Power Disable bit ; 1- Disable ; 0 - Enable
// bit3 - LVI5OR3 - LVI 5V or 3V Operating mode ; 1 - LVI 5 v; 0 - LVI 3V
// bit2 - SSREC: Short Stop RECovery bit;
// bit1 - STOP: Stop instruction enable bit; 1: Enable; 0: Disable
// bit0 - COPD: COP Disable bit; 1: COP Disable; 0: COP Enable
// Reset value: 0x00

CONFIG2=0x00;
// Internal oscillator ; IRQ pin disabled ; Reset pin disabled ;

// Bit 7 6 5 4 3 2 1 0
// IRQPUD IRQEN R OSCOPT1 OSCOPT0 R R RSTEN

// 0-PA2 pullup 1-IRQ in pin 00- internal osc 1- reset in pin
// 1-NO Pullup 01- external osc 0- rst not active in pin

FLBPR=0xFF;

//I/O port Intialization Port A

PTA = 0x00;
PTB = 0x00;
PTD = 0x00;



DDRA = 0x01;
DDRB = 0x01;
DDRD = 0x01;

PTAPUE=0x40;

__RESET_WATCHDOG();

}

THANKS FOR ANY HELP

lazycat · ‎03-08-2007

hey Thank you peg and BIGMAC!!!

But i got another question haha,, do the clock need to be set at 9.8MHZ to the ROM ROUTINES?

I keep getting the "illegal address error caused a reset" What are the possible errors that may caused it? Even if i am not using the ROM ROUTINES to program, i still get the same message.

and last question haha.. I downloaded and use the code of AN2504 but still the same illegal message happens.

Thanks for any help and reply!

Message Edited by lazycat on 2007-03-0801:23 AM

peg · ‎03-08-2007

Hi lazycat,

The CPU speed is one of the parameters passed to the ROM routine in the RAM array, so, no you don't need to programme at 9.8MHz. But you do need to tell it what the speed is.

The illegal address reset means that your code (or the ROM code) has jumped to an address that is out of the memory map. Are you feeding the parameters to the ROM routines correctly?

Have you read AN2874?

bigmac · ‎03-07-2007

Hello,

The ROM routines cannot be single-stepped during debug. And there is really little point in attempting to do so, since you can't alter anything.

Even if the PRGRNGE and ERARNGE routines were to be transfered to RAM, it is stll not a good idea to single-step them. These routines have critical timing requirements, and you could risk damaging the flash memory.

To call these routines from within your own code, it is not necessary to be in monitor mode, so the application of the external high voltage is unnecessary.

Regards,

Mac

peg · ‎03-07-2007

Hi lazycat,

Further to what Mac has said...

The high voltage on reset is purely a method to get into monitor mode with a non-blank device.

It is NOT (as I believe you may be confusing it with) a FLASH programming voltage.

Reset would just be logic high while you are programming using the ROM routines.

Flash rom rountines using hc908 jk3 PROBLEMS

Flash rom rountines using hc908 jk3 PROBLEMS

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