Binary counter for large numbers

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Binary counter for large numbers

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Mei
Contributor IV

Binary counter for large numbers

For high frequencies, i.e. short times, the controllers spoil us with timers.
But Software is necessary for very long periods of time. So, I developed a small counting loop with a few program lines with my S08 BDM board. A few RAM bytes are required as a counter. The simple algorithm is independent of the controller and programming language.

Mei_0-1639943189373.png

Algorithms for the 3-byte counter cycle       (Waiting loop for a single run)

 

  • Binary counter means that all bits of the bytes used are counted with increasing significance.
  • Counter for large numbers means: The maximum count number increases with 2n  of n bits. Three bytes of 8 bits each, can also count up to 224 = 16.777.216, Four Bytes can count to 4.294.967.296 and so on.

 

Time counters need a clock. For this I used a TPM channel xxxxx with a toggle output. This enabled me to measure the clock on port PTA0.

Here is the algorithm for the TPM-ISR controlled step-by-step operation of the counting loop:

Mei_1-1639943414390.png

 

Algorithms for step-by-step operation

The assembler program:

; -- 3 Byte with TPM --
; TPMCH0V, Bus cycle without divider

XDEF Entry,main,T_ISR

Include 'derivative.inc'

Z1 EQU $67 ; Define 3 byte RAM places
Z2 EQU $68
Z3 EQU $69

Init_Timer:
mov #$4D,TPMC0VH ; H,L Comparison values for 10 ms
mov #$E6,TPMC0VL ;
mov #$54,TPMC0SC ; Channel 0 settings for toggle output on compare
bset 3, TPMSC ; Switch on timer start by bus
rts
; ---------------------------------------------------------------------
Load:
mov #$0F, Z1
mov #$27, Z2
mov #$00, Z3
rts
; ---------------------------------------------------------------------
main:
Entry:
Main_Init:
bsr Init_Timer ; Initialize Timer
bsr Load ; Load 3 byte counter values
lda #$12
sta SOPT1 ; disable watchdog
cli ; Allow interrupts to happen
lda #$FF
sta PTBDD ; Port B Pins are output and low
; ----------------------------------------------------------------------
loop:
bra loop
; ---------------------------------------------------------------------
T_ISR:
bclr 7, TPMC0SC ; Clear overflow flag
bset 7, TPMCNTH ; setting of any bit clears the counter
; -----------------------------------------------------------------------------
; Counting the Interupts with 3 bytes,
; ----------------------------------------------------------------------------
tst Z1 ; see figure with the algorithm
E: beq Z
Ee: dec Z1
rti
Z: tst Z2
beq Ha
Zz: dec Z2
bra Ee
Ha: tst Z3
beq La
dec Z3
M01: bra Zz
La: bsr Load
; --------------------------------------------------------------------
; Switch PTB6
; ---------------------------------------------------------------------
brset 6,2,L1
bset 6,2
rti
L1: bclr 6,2
rti
nop
END

Mei_0-1639944365920.png

I hope my thoughts are understandable and maybe of use to someone

Gerd Meinert

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Mei
Contributor IV

Hi Johnnn,

I appreciate your reply but, sorry, can't see any text.

Can you write me again?

With best regards

Mei

 

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